docs: Various updates to N3XX manuals

3 files changed, 100 insertions, 8 deletions

diff --git a/host/docs/configuration.dox b/host/docs/configuration.dox
index aa054b650..ccc3129fb 100644
--- a/host/docs/configuration.dox
+++ b/host/docs/configuration.dox
@@ -23,10 +23,10 @@ and possible more options.
  Key                 | Description                                                                  | Supported Devices | Example Value
 ---------------------|------------------------------------------------------------------------------|-------------------|---------------------
  blank_eeprom        | *Caution!* Having this key will erase the EEPROM and can damage your device! | X3x0              | blank_eeprom=1
- fpga                | Provide alternative FPGA bitfile                                             | All USB Devices, X3x0 (PCIe only), All embedded devices | fpga=/path/to/bitfile.bit
+ fpga                | Provide alternative FPGA bitfile                                             | All USB Devices, X3x0 (PCIe only), E310, E1x0 | fpga=/path/to/bitfile.bit
  fw                  | Provide alternative firmware                                                 | All USB Devices, X3x0 | fw=/path/to/fw.bin
  ignore-cal-file     | Ignores existing device calibration files                                    | All Devices with cal-file support| See \ref ignore_cal_file
- master_clock_rate   | Master Clock Rate in Hz                                                      | X3x0, B2x0, B1x0, E3x0, E1x0 | master_clock_rate=16e6
+ master_clock_rate   | Master Clock Rate in Hz                                                      | X3x0, B2x0, B1x0, E3x0, E1x0, N3xx | master_clock_rate=16e6
  dboard_clock_rate   | Daughterboard clock rate in Hz                                               | X3x0               | dboard_clock_rate=50e6
  mcr                 | Override master clock rate settings (see \ref usrp1_hw_extclk)               | USRP1              | mcr=52e6
  niusrprpc_port      | RPC Port for NI USRP RIO                                                     | X3x0               | niusrprpc_port=5445
@@ -34,9 +34,9 @@ and possible more options.
  self_cal_adc_delay  | Run ADC transfer delay self-calibration.                                     | X3x0               | self_cal_adc_delay=1
  ext_adc_self_test   | Run an extended ADC self test (more than the usual)                          | X3x0               | ext_adc_self_test=1
  recover_mb_eeprom   | Disable version checks. Can damage hardware. Only recommended for recovering devices with corrupted EEPROMs. | X3x0, N230 | recover_mb_eeprom=1
- skip_dram           | Ignore DRAM FIFO block. Connect TX streamers straight into DUC or radio.     | X3x0               | skip_dram=1
- skip_ddc            | Ignore DDC block. Connect Rx streamers straight into radio.                  | X3x0               | skip_ddc=1
- skip_duc            | Ignore DUC block. Connect Rx streamers or DRAM straight into radio.          | X3x0               | skip_duc=1
+ skip_dram           | Ignore DRAM FIFO block. Connect TX streamers straight into DUC or radio.     | X3x0, N3x0         | skip_dram=1
+ skip_ddc            | Ignore DDC block. Connect Rx streamers straight into radio.                  | X3x0, N3x0         | skip_ddc=1
+ skip_duc            | Ignore DUC block. Connect Rx streamers or DRAM straight into radio.          | X3x0, N3x0         | skip_duc=1
 
 
 In addition, many of the streaming-related options can be set per-device at configuration time.
diff --git a/host/docs/dboards.dox b/host/docs/dboards.dox
index c51b92e85..0cb559061 100644
--- a/host/docs/dboards.dox
+++ b/host/docs/dboards.dox
@@ -405,6 +405,9 @@ Notes:
 
 Please refer to \ref e3x0_dboard_e310.
 
+\subsection dboards_n310 N310 XCVR board
+
+Please refer to \ref n3xx_mg.
 
 \subsection dboards_clock_rate Daughterboard reference clock
 
diff --git a/host/docs/usrp_n3xx.dox b/host/docs/usrp_n3xx.dox
index 97d92b823..7845327be 100644
--- a/host/docs/usrp_n3xx.dox
+++ b/host/docs/usrp_n3xx.dox
@@ -5,13 +5,32 @@
 \section n3xx_feature_list Comparative features list
 
 - Hardware Capabilities:
+	- Dual SFP+ Transceivers (can be used with 1 GigE, 10 GigE)
 	- External PPS input & output
 	- External 10 MHz input & output
+	- Internal 25 MHz reference clock
+	- Internal GPSDO for timing, location, and 20 MHz reference clock + PPS
+	- External GPIO Connector with UHD API control
+	- External USB Connection for built-in JTAG debugger and serial console
+        - Xilinx Zynq SoC with dual-core ARM Cortex A9 and Virtex-7 FPGA
+
+- Software Capabilities:
+        - Full Linux system running on the ARM core
+        - Runs MPM (see also \ref page_mpm)
+
 - FPGA Capabilities:
 	- Timed commands in FPGA
 	- Timed sampling in FPGA
+        - RFNoC capability
 
-tbw
+The N3XX series of USRPs is designed as a platform. The following USRPs are
+variants of the N3XX series:
+
+\section n3xx_feature_list_mg N310 (4-channel transceiver)
+
+	- Supported master clock rates: 200 MHz and 184.32 MHz
+	- 4 RX DDC chains in FPGA
+	- 4 TX DUC chain in FPGA
 
 \section n3xx_getting_started Getting started
 
@@ -68,13 +87,66 @@ You should be presented with a shell similar to the following (FIXME):
 
 \subsection n3xx_getting_started_connectivity Network Connectivity
 
-tbw
+tbw (Using ifconfig, using systemd to set static IPs)
+
+\subsection n3xx_getting_started_security Security-related settings
+
+The N3XX ships without a root password set. It is possible to ssh into the
+device by simply connecting as root, and thus gaining access to all subsystems.
+To set a password, run the command
+
+    $ passwd
+
+on the device.
+
 
 \subsection n3xx_getting_started_fpga_update Updating the FPGA
 
+tbw (using uhd_image_loader)
+
+\section n3xx_usage Using an N3XX USRP from UHD
+
+Like any other USRP, all N3XX USRPs are controlled by the UHD software. To
+integrate a USRP N3XX into your C++ application, you would generate a UHD
+device in the same way you would for any other USRP:
+
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~{.cpp}
+auto usrp = uhd::usrp::multi_usrp::make("type=n3xx");
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+For a list of which arguments can be passed into make(), see Section
+\ref n3xx_usage_device_args.
+
+\subsection n3xx_usage_device_args Device arguments
+
+ Key                 | Description                                                                  | Supported Devices | Example Value
+---------------------|------------------------------------------------------------------------------|-------------------|---------------------
+ addr                | IPv4 address of primary SFP+ port to connect to.                             | All N3xx          | addr=192.168.30.2
+ second_addr         | IPv4 address of secondary SFP+ port to connect to.                           | All N3xx          | second_addr=192.168.40.2
+ mgmt_addr           | IPv4 address which to connect the RPC client. Defaults to `addr.             | All N3xx          | mgmt_addr=10.1.2.3 (can also go to RJ45)
+ master_clock_rate   | Master Clock Rate in Hz                                                      | N310              | master_clock_rate=125e6
+ identify            | Causes front-panel LEDs to blink. The duration is variable.                  | N310              | identify=5 (will blink for about 5 seconds)
+ serialize_init      | Force serial initialization of daughterboards.                               | All N3xx          | serialize_init=1
+ skip_dram           | Ignore DRAM FIFO block. Connect TX streamers straight into DUC or radio.     | All N3xx          | skip_dram=1
+ skip_ddc            | Ignore DDC block. Connect Rx streamers straight into radio.                  | All N3xx          | skip_ddc=1
+ skip_duc            | Ignore DUC block. Connect Rx streamers or DRAM straight into radio.          | All N3xx          | skip_duc=1
+ ref_clk_freq        | Specify the external reference clock frequency, default is 10 MHz.           | N310              | ref_clk_freq=20e6
+ init_cals           | Specify the bitmask for initial calibrations of the RFIC.                    | N310              | init_cals=0x4DFF
+ init_cals_timeout   | Timeout for initial calibrations in milliseconds.                            | N310              | init_cals_timeout=45000
+ tracking_cals       | Specify the bitmask for tracking calibrations of the RFIC.                   | N310              | tracking_cals=0xC3
+ rx_lo_source        | Initialize the source for the RX LO.                                         | N310              | rx_lo_source=external
+ tx_lo_source        | Initialize the source for the TX LO.                                         | N310              | tx_lo_source=external
+
+\subsection n3xx_usage_sensors The sensor API
+
+\section n3xx_rasm Remote Management
+
+- Mender
+- Salt
+
 tbw
 
-\subsection n3xx_theory_of_ops Theory of Operation
+\section n3xx_theory_of_ops Theory of Operation
 
 The N3xx-series are devices based on the MPM architecture (see
 also: \ref page_mpm). Inside the Linux operating system running on the ARM
@@ -83,5 +155,22 @@ device to function as a USRP (it is enabled to run by default).
 
 A large portion of hardware-specific setup is handled by the daemon.
 
+tbw
+
+\section n3xx_mg N310-specific Features
+
+\subsection n3xx_mg_eeprom Storing user data in the EEPROM
+
+The N310 daughterboard has an EEPROM which is primarily used for storing the
+serial number, product ID, and other product-specific information. However, it
+can also be used to store user data, such as calibration information.
+
+Note that EEPROMs have a limited number of write cycles, and storing user data
+should happen only when necessary. Writes should be kept at a minimum.
+
+Storing data on the EEPROM is done by loading a uhd::eeprom_map_t object into
+the property tree. On writing this property, the driver code will serialize
+the map into a binary representation that can be stored on the EEPROM.
+
 */
 // vim:ft=doxygen: