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| author | Martin Braun <martin.braun@ettus.com> | 2022-03-07 14:32:40 +0100 |
|---|---|---|
| committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2022-04-06 14:31:56 -0700 |
| commit | 1380b91e542d1280372de6fa8d712574692e9e66 (patch) | |
| tree | 89a4897523dd2375ec637c2f43881676f3f790b5 /host/docs | |
| parent | 9738209380a8104b371f3eff03f9772daa15060d (diff) | |
| download | uhd-1380b91e542d1280372de6fa8d712574692e9e66.tar.gz uhd-1380b91e542d1280372de6fa8d712574692e9e66.tar.bz2 uhd-1380b91e542d1280372de6fa8d712574692e9e66.zip | |
docs: e31x: Update information on GPIO pin header
- Note on drawing power from the 3.3V rail
- Clarified purpose of Pins 2 and 4 (peripheral I2C bus)
Diffstat (limited to 'host/docs')
| -rw-r--r-- | host/docs/gpio_api.dox | 9 | ||||
| -rw-r--r-- | host/docs/usrp_e3xx.dox | 17 |
2 files changed, 18 insertions, 8 deletions
diff --git a/host/docs/gpio_api.dox b/host/docs/gpio_api.dox index 82e5fa253..b046e89b9 100644 --- a/host/docs/gpio_api.dox +++ b/host/docs/gpio_api.dox @@ -50,9 +50,9 @@ The +3.3V is for ESD clamping purposes only and not designed to deliver high cur ### Pin Mapping - Pin 1: +3.3V -- Pin 2: Reserved +- Pin 2: I2C SCL (3.3 V) - Pin 3: Data[5] -- Pin 4: Reserved +- Pin 4: I2C SDA (3.3 V) - Pin 5: Data[4] - Pin 6: Data[0] - Pin 7: Data[3] @@ -60,6 +60,11 @@ The +3.3V is for ESD clamping purposes only and not designed to deliver high cur - Pin 9: 0V - Pin 10: Data[2] +Pin 1 is connected to the shared +3.3V power rail and can be used to draw power. +The maximum current depends on the power used by the rest of the device, but +300-500 mA is generally safe. It is recommended to monitor the rail voltage +when drawing power from this pin. + \subsection e320_gpio_conn E320 External GPIO connector ### Front Panel GPIO Connections diff --git a/host/docs/usrp_e3xx.dox b/host/docs/usrp_e3xx.dox index 1fe37d195..cbaf505f1 100644 --- a/host/docs/usrp_e3xx.dox +++ b/host/docs/usrp_e3xx.dox @@ -723,14 +723,14 @@ will look like this: # [...] \endcode -\section e3xx_gpio The Front-Panel GPIO +\section e3xx_gpio Internal or Front-Panel GPIO \b Note: Do not source high currents (more than 5 mA) per pin. The GPIOs are not designed to drive high loads! -\b Note: Unlike the X300 series, the E3XX series does not have user-programmable -daughterboard GPIOs. The front-panel GPIOs can still be used to track the ATR -state of the radios, though (see below). +\b Note: Unlike the X300 series, the E3XX series does not have +user-programmable daughterboard GPIOs. The front-panel (or internal) GPIOs can +still be used to track the ATR state of the radios, though (see below). The USRP E310 has 6 programmable GPIO pins, accessible through an internal connector (see also \ref e31x_hw_gpio). The E320 has 8 GPIO pins, accessible @@ -1050,9 +1050,9 @@ of your device. Note that this supply voltage is turned off in order to save pow ### Pin Mapping - Pin 1: +3.3V -- Pin 2: Reserved +- Pin 2: I2C SCL (3.3 V) - Pin 3: Data[5] -- Pin 4: Reserved +- Pin 4: I2C SDA (3.3 V) - Pin 5: Data[4] - Pin 6: Data[0] - Pin 7: Data[3] @@ -1060,6 +1060,11 @@ of your device. Note that this supply voltage is turned off in order to save pow - Pin 9: 0V - Pin 10: Data[2] +Pin 1 is connected to the shared +3.3V power rail and can be used to draw power. +The maximum current depends on the power used by the rest of the device, but +300-500 mA is generally safe. It is recommended to monitor the rail voltage +when drawing power from this pin. + Please see the \ref page_gpio_api for information on configuring and using the GPIO bus. \subsection e31x_hw_chipscope Debugging custom FPGA designs with Xilinx Chipscope |