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authorMartin Braun <martin.braun@ettus.com>2016-06-22 20:01:42 -0700
committerMartin Braun <martin.braun@ettus.com>2016-06-23 09:58:20 -0700
commitef57ffcbbf33f16d4fecb73749e3bb0fc4cd473d (patch)
tree6342382f3d1c45fc5c83ca36fed24a2d4a173aff /host/docs/usrp_x3x0.dox
parentfd9dc3f2be1e8056a1355351b97c7d40e9bd2d1f (diff)
parent9caf20c29956be283b032110096a81f99a121da7 (diff)
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Merge branch 'maint'
Conflicts: host/lib/usrp/b200/b200_impl.cpp
Diffstat (limited to 'host/docs/usrp_x3x0.dox')
-rw-r--r--host/docs/usrp_x3x0.dox2
1 files changed, 1 insertions, 1 deletions
diff --git a/host/docs/usrp_x3x0.dox b/host/docs/usrp_x3x0.dox
index 625048da1..ae3647641 100644
--- a/host/docs/usrp_x3x0.dox
+++ b/host/docs/usrp_x3x0.dox
@@ -17,7 +17,7 @@ More information:
- External PPS input & output
- External 10 MHz input & output
- Expandable via 2nd SFP+ interface
- - Supported master clock rates: 200 MHz, 184.32 MHz, 120 MHz
+ - Supported master clock rates: 200 MHz and 184.32 MHz
- External GPIO Connector with UHD API control
- External USB Connection for built-in JTAG debugger
- Internal GPSDO option