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| author | Martin Braun <martin.braun@ettus.com> | 2017-01-18 11:02:08 -0800 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2017-01-18 11:02:08 -0800 |
| commit | 4661358a0bc90f215ee0e18d2515d5cb974561c8 (patch) | |
| tree | da72ca2fbb5e06fa2860dad42acd8d66e45065d3 /host/docs/usrp_x3x0.dox | |
| parent | 52ca2e0b8045c254c2be1911e77e8bd3d94ceeab (diff) | |
| parent | d778c0af9daf350de29c3acb7ab1cc59f63dd641 (diff) | |
| download | uhd-4661358a0bc90f215ee0e18d2515d5cb974561c8.tar.gz uhd-4661358a0bc90f215ee0e18d2515d5cb974561c8.tar.bz2 uhd-4661358a0bc90f215ee0e18d2515d5cb974561c8.zip | |
Merge branch 'maint'
Diffstat (limited to 'host/docs/usrp_x3x0.dox')
| -rw-r--r-- | host/docs/usrp_x3x0.dox | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/host/docs/usrp_x3x0.dox b/host/docs/usrp_x3x0.dox index ac59c86a3..0c0c239c0 100644 --- a/host/docs/usrp_x3x0.dox +++ b/host/docs/usrp_x3x0.dox @@ -28,7 +28,6 @@ More information: - 2 TX DUC chain in FPGA - Timed commands in FPGA - Timed sampling in FPGA - - 16-bit and 8-bit sample modes (sc8 and sc16) - Up to 120 MHz of RF bandwidth with 16-bit samples \section x3x0_getting_started Getting started |