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authorJason Abele <jason@ettus.com>2010-11-23 17:05:14 -0800
committerJason Abele <jason@ettus.com>2010-11-23 17:05:14 -0800
commitb8b4d9406c9785546c575addff2a5ba518ecd790 (patch)
tree38fca8642d000a9565096b96676509eda9a60873 /host/docs/usrp_nxxx.rst
parent0c147c98dcfae13e802db9bbfb0fb6226ae9f115 (diff)
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Updated refclock docs for USRP1, USRP2 and N2XX
Added power range limits Added external refclock notes for USRP1
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1 files changed, 13 insertions, 5 deletions
diff --git a/host/docs/usrp_nxxx.rst b/host/docs/usrp_nxxx.rst
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@@ -228,19 +228,27 @@ The LEDs reveal the following about the state of the device:
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Ref Clock - 10MHz
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-Using an external 10MHz reference clock requires a signal level between
-+5dBm and +20dBm at 10MHz applied to the Ref Clock SMA port on the front panel.
+Using an external 10MHz reference clock, square wave will offer the best phase
+noise performance, but sinusoid is acceptable. The reference clock requires the following power level:
+
+* **USRP2** 5 to 15dBm
+* **N2XX** 0 to 15dBm
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
PPS - Pulse Per Second
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-Using a PPS signal for timestamp synchronization requires a 5Vpp square wave signal
+Using a PPS signal for timestamp synchronization requires a square wave signal with the following amplitude:
+
+* **USRP2** 5Vpp
+* **N2XX** 3.3 to 5Vpp
+
+Test the PPS input with the following app:
+
+* <args> are device address arguments (optional if only one USRP is on your machine)
-Test the PPS input of the USRP2 with the following app:
::
cd <prefix>/share/uhd/examples
./test_pps_input --args=<args>
-* <args> are device address arguments (optional if only one USRP is on your machine)