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author | Josh Blum <josh@joshknows.com> | 2012-07-19 14:20:45 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2012-07-19 14:20:45 -0700 |
commit | ba9a627475446582afa9b6e624a1248748a98951 (patch) | |
tree | a99797a4ca29d662b136b0e53414b1f32194d521 /host/docs/usrp_e1x0.rst | |
parent | 9d0ce59f3c3be59165e348c3a9d4bc3429821dcc (diff) | |
download | uhd-ba9a627475446582afa9b6e624a1248748a98951.tar.gz uhd-ba9a627475446582afa9b6e624a1248748a98951.tar.bz2 uhd-ba9a627475446582afa9b6e624a1248748a98951.zip |
b100/e100: clock source option for pps phase sync abuse
Diffstat (limited to 'host/docs/usrp_e1x0.rst')
-rw-r--r-- | host/docs/usrp_e1x0.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/host/docs/usrp_e1x0.rst b/host/docs/usrp_e1x0.rst index 9373e5255..189cbb86b 100644 --- a/host/docs/usrp_e1x0.rst +++ b/host/docs/usrp_e1x0.rst @@ -130,7 +130,7 @@ The LEDs on the front panel can be useful in debugging hardware and software issues. The LEDs reveal the following about the state of the device: * **LED A:** transmitting -* **LED B:** fpga loaded +* **LED B:** PPS signal * **LED C:** receiving * **LED D:** fpga loaded * **LED E:** reference lock |