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authorMartin Braun <martin.braun@ettus.com>2016-10-26 17:28:00 -0700
committerMartin Braun <martin.braun@ettus.com>2016-10-26 17:28:00 -0700
commit248377a1db9f2761fd984528cde11ab66555ebfb (patch)
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parent9517de45709adaea8b574011573a565007149d5d (diff)
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Merge branch 'maint'
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@@ -42,7 +42,7 @@ images:
\section b200_mcr Changing the Master Clock Rate
The master clock rate feeds the RF frontends and the DSP chains. Users
-may select non-default clock rates to acheive integer decimations or
+may select non-default clock rates to achieve integer decimation rates or
interpolations in the DSP chains. The clock rate can be set to any value
between 5 MHz and 61.44 MHz (or 30.72 MHz for dual-channel mode).
Note that rates above 56 MHz are possible, but not recommended.