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author | Derek Kozel <derek.kozel@ettus.com> | 2016-10-20 19:50:00 -0700 |
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committer | mbr0wn <martin.braun@ettus.com> | 2016-10-21 10:05:23 -0700 |
commit | 2a0e0612dcc9a477e690addae3fd8b42ed301f26 (patch) | |
tree | 43eb9c9e86bc6d6ba4071b3eac3027bd9adafb94 /host/docs/usrp_b200.dox | |
parent | 9b215d85b7ae09b253839f93284a637ebc3385c3 (diff) | |
download | uhd-2a0e0612dcc9a477e690addae3fd8b42ed301f26.tar.gz uhd-2a0e0612dcc9a477e690addae3fd8b42ed301f26.tar.bz2 uhd-2a0e0612dcc9a477e690addae3fd8b42ed301f26.zip |
Docs: Minor housekeeping
Diffstat (limited to 'host/docs/usrp_b200.dox')
-rw-r--r-- | host/docs/usrp_b200.dox | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/host/docs/usrp_b200.dox b/host/docs/usrp_b200.dox index 2192ba63e..1d5374b3a 100644 --- a/host/docs/usrp_b200.dox +++ b/host/docs/usrp_b200.dox @@ -42,7 +42,7 @@ images: \section b200_mcr Changing the Master Clock Rate The master clock rate feeds the RF frontends and the DSP chains. Users -may select non-default clock rates to acheive integer decimations or +may select non-default clock rates to achieve integer decimation rates or interpolations in the DSP chains. The clock rate can be set to any value between 5 MHz and 61.44 MHz (or 30.72 MHz for dual-channel mode). Note that rates above 56 MHz are possible, but not recommended. |