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author | Josh Blum <josh@joshknows.com> | 2012-07-17 16:32:59 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2012-07-17 16:32:59 -0700 |
commit | c5207ff2834c2ff9012d59b94e29d90573e9277f (patch) | |
tree | 77bb6266d0f34b9ab58719731e3c94b735036fdd /host/docs/usrp2.rst | |
parent | dd4c2242a014d5429d8cfde74d9a61bf75faa249 (diff) | |
download | uhd-c5207ff2834c2ff9012d59b94e29d90573e9277f.tar.gz uhd-c5207ff2834c2ff9012d59b94e29d90573e9277f.tar.bz2 uhd-c5207ff2834c2ff9012d59b94e29d90573e9277f.zip |
docs: added comparative features list at top of each
Diffstat (limited to 'host/docs/usrp2.rst')
-rw-r--r-- | host/docs/usrp2.rst | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/host/docs/usrp2.rst b/host/docs/usrp2.rst index d70a08cd7..8e9aa6d50 100644 --- a/host/docs/usrp2.rst +++ b/host/docs/usrp2.rst @@ -1,10 +1,26 @@ ======================================================================== -UHD - USRP2 and N Series Application Notes +UHD - USRP2 and N2X0 Series Application Notes ======================================================================== .. contents:: Table of Contents ------------------------------------------------------------------------ +Comparative features list +------------------------------------------------------------------------ + +* 1 transceiver card slot +* 2 RX DDC chains in FPGA +* 1 TX DUC chain in FPGA +* Timed commands in FPGA (N2x0 only) +* Timed sampling in FPGA +* External PPS reference +* External 10MHz reference +* MIMO cable shared reference +* Fixed 100 MHz clock rate +* Internal GPSDO option (N2x0 only) +* sc8 and sc16 sample modes + +------------------------------------------------------------------------ Load the Images onto the SD card (USRP2 only) ------------------------------------------------------------------------ **Warning!** |