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author | Nicholas Corgan <nick.corgan@ettus.com> | 2012-03-30 09:27:59 -0700 |
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committer | Nicholas Corgan <nick.corgan@ettus.com> | 2012-03-30 09:27:59 -0700 |
commit | e8d9b4d94b201aa808c63f29b7edd6efdc56440e (patch) | |
tree | 0533184c37925d3f1c73bfd8be16697545733740 /host/docs/usrp1.rst | |
parent | d1ad808f78497db2770a346d560c9a7f21ff1f1f (diff) | |
download | uhd-e8d9b4d94b201aa808c63f29b7edd6efdc56440e.tar.gz uhd-e8d9b4d94b201aa808c63f29b7edd6efdc56440e.tar.bz2 uhd-e8d9b4d94b201aa808c63f29b7edd6efdc56440e.zip |
docs: All instances of "the UHD" have been changed to "UHD". All paths, filenames, variables, etc. have been uniformly emphasized.
Diffstat (limited to 'host/docs/usrp1.rst')
-rw-r--r-- | host/docs/usrp1.rst | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/host/docs/usrp1.rst b/host/docs/usrp1.rst index b698da96e..6242ccb6a 100644 --- a/host/docs/usrp1.rst +++ b/host/docs/usrp1.rst @@ -5,7 +5,7 @@ UHD - USRP1 Application Notes .. contents:: Table of Contents ------------------------------------------------------------------------ -Specify a non-standard image +Specify a Non-standard Image ------------------------------------------------------------------------ The standard USRP1 images installer comes with two FPGA images: * **usrp1_fpga.rbf:** 2 DDCs + 2 DUCs @@ -31,7 +31,7 @@ Example device address string representations to specify non-standard firmware a fpga=usrp1_fpga_4rx.rbf, fw=usrp1_fw_custom.ihx ------------------------------------------------------------------------ -Missing and emulated features +Missing and Emulated Features ------------------------------------------------------------------------ The USRP1 FPGA does not have the necessary space to support the advanced streaming capabilities that are possible with the newer USRP devices. @@ -62,17 +62,17 @@ List of missing features * Start of burst flags for transmit/receive ------------------------------------------------------------------------ -Hardware setup notes +Hardware Setup Notes ------------------------------------------------------------------------ ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ External clock modification ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ The USRP can be modified to accept an external clock reference instead of the 64MHz onboard reference. - * Solder SMA (LTI-SASF54GT) connector to J2001 - * Move 0 ohm 0603 resistor R2029 to R2030 - * Move 0.01uF 0603 capacitor C925 to C926 - * Remove 0.01uF 0603 capacitor C924 + * Solder SMA (**LTI-SASF54GT**) connector to **J2001**. + * Move 0 ohm 0603 resistor **R2029** to **R2030**. + * Move 0.01uF 0603 capacitor **C925** to **C926**. + * Remove 0.01uF 0603 capacitor **C924**. The new external clock needs to be a square wave between +7dBm and +15dBm |