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| author | Josh Blum <josh@joshknows.com> | 2012-08-31 11:20:17 -0700 |
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| committer | Josh Blum <josh@joshknows.com> | 2012-08-31 11:20:17 -0700 |
| commit | 667dcf0b98bb5a99654cf883fb97d2a549582cff (patch) | |
| tree | 7c845d7ac3f506c000ab495b1d62d976b816b5cd /host/docs/usrp1.rst | |
| parent | 05a06254a7f0149425bdda0e5544507bd35a671b (diff) | |
| parent | 36a7def9aa6cecaa6f3cbf9979544d6fd5848a08 (diff) | |
| download | uhd-667dcf0b98bb5a99654cf883fb97d2a549582cff.tar.gz uhd-667dcf0b98bb5a99654cf883fb97d2a549582cff.tar.bz2 uhd-667dcf0b98bb5a99654cf883fb97d2a549582cff.zip | |
Merge branch 'next'
Diffstat (limited to 'host/docs/usrp1.rst')
| -rw-r--r-- | host/docs/usrp1.rst | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/host/docs/usrp1.rst b/host/docs/usrp1.rst index 6242ccb6a..c1fdec146 100644 --- a/host/docs/usrp1.rst +++ b/host/docs/usrp1.rst @@ -5,6 +5,17 @@ UHD - USRP1 Application Notes .. contents:: Table of Contents ------------------------------------------------------------------------ +Comparative features list +------------------------------------------------------------------------ + +* 2 transceiver card slots +* 2 RX DDC chains in FPGA +* 2 TX DUC chains in FPGA (no TX CORDIC -> uses DAC) +* 64 MHz fixed clock rate +* sc16 sample modes +* sc8 sample mode - RX only + +------------------------------------------------------------------------ Specify a Non-standard Image ------------------------------------------------------------------------ The standard USRP1 images installer comes with two FPGA images: |