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| author | Josh Blum <josh@joshknows.com> | 2012-07-17 16:32:59 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2012-07-17 16:32:59 -0700 |
| commit | c5207ff2834c2ff9012d59b94e29d90573e9277f (patch) | |
| tree | 77bb6266d0f34b9ab58719731e3c94b735036fdd /host/docs/usrp1.rst | |
| parent | dd4c2242a014d5429d8cfde74d9a61bf75faa249 (diff) | |
| download | uhd-c5207ff2834c2ff9012d59b94e29d90573e9277f.tar.gz uhd-c5207ff2834c2ff9012d59b94e29d90573e9277f.tar.bz2 uhd-c5207ff2834c2ff9012d59b94e29d90573e9277f.zip | |
docs: added comparative features list at top of each
Diffstat (limited to 'host/docs/usrp1.rst')
| -rw-r--r-- | host/docs/usrp1.rst | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/host/docs/usrp1.rst b/host/docs/usrp1.rst index 6242ccb6a..c1fdec146 100644 --- a/host/docs/usrp1.rst +++ b/host/docs/usrp1.rst @@ -5,6 +5,17 @@ UHD - USRP1 Application Notes .. contents:: Table of Contents ------------------------------------------------------------------------ +Comparative features list +------------------------------------------------------------------------ + +* 2 transceiver card slots +* 2 RX DDC chains in FPGA +* 2 TX DUC chains in FPGA (no TX CORDIC -> uses DAC) +* 64 MHz fixed clock rate +* sc16 sample modes +* sc8 sample mode - RX only + +------------------------------------------------------------------------ Specify a Non-standard Image ------------------------------------------------------------------------ The standard USRP1 images installer comes with two FPGA images: |