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authorAshish Chaudhari <ashish@ettus.com>2015-07-22 17:54:17 -0700
committerAshish Chaudhari <ashish@ettus.com>2015-07-22 17:54:17 -0700
commitf76f599be281d773736940d53aafc6d7e9d536ca (patch)
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x300: Added a comprehensive radio reset sequence
- Everytime the LMK is configured, we do the following: - Reset all LMK regs - Wait for LMK lock - Reset radio_clk PLL in FPGA - Wait for FPGA PLL to lock - Assert radio_rst which resets downstream radio logic - This address the intermittent self-cal failures due to uncalibrated IDELAY taps - Bumped FPGA compat to 12
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