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author | Ashish Chaudhari <ashish@ettus.com> | 2015-07-22 17:54:17 -0700 |
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committer | Ashish Chaudhari <ashish@ettus.com> | 2015-07-22 17:54:17 -0700 |
commit | f76f599be281d773736940d53aafc6d7e9d536ca (patch) | |
tree | 51bbbfb2d7995c6de7a50671b929a054760c2765 /host/docs/install.dox | |
parent | dfedaf1726cd6ed1dbfc1c9d8c40716a557b05ed (diff) | |
download | uhd-f76f599be281d773736940d53aafc6d7e9d536ca.tar.gz uhd-f76f599be281d773736940d53aafc6d7e9d536ca.tar.bz2 uhd-f76f599be281d773736940d53aafc6d7e9d536ca.zip |
x300: Added a comprehensive radio reset sequence
- Everytime the LMK is configured, we do the following:
- Reset all LMK regs
- Wait for LMK lock
- Reset radio_clk PLL in FPGA
- Wait for FPGA PLL to lock
- Assert radio_rst which resets downstream radio logic
- This address the intermittent self-cal failures due to uncalibrated IDELAY taps
- Bumped FPGA compat to 12
Diffstat (limited to 'host/docs/install.dox')
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