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author | Martin Braun <martin.braun@ettus.com> | 2016-10-26 17:28:00 -0700 |
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committer | Martin Braun <martin.braun@ettus.com> | 2016-10-26 17:28:00 -0700 |
commit | 248377a1db9f2761fd984528cde11ab66555ebfb (patch) | |
tree | 1c638c0affb9b3154d288b74428cd5a912edd24a /host/docs/general.dox | |
parent | f386a2805b1cda04eef8c2ba1a3c680edf28c2a6 (diff) | |
parent | 9517de45709adaea8b574011573a565007149d5d (diff) | |
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Merge branch 'maint'
Diffstat (limited to 'host/docs/general.dox')
-rw-r--r-- | host/docs/general.dox | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/host/docs/general.dox b/host/docs/general.dox index 3e9dfc63a..ff407a304 100644 --- a/host/docs/general.dox +++ b/host/docs/general.dox @@ -8,7 +8,7 @@ A USRP device has two stages of tuning: -- RF front-end: translates bewteen RF and IF +- RF front-end: translates between RF and IF - DSP: translates between IF and baseband In a typical use-case, the user specifies an overall center frequency @@ -99,7 +99,7 @@ clock selection, allowing a broader range of sample rate selections by applicati pages for more details. In many cases using USRPs with flexible master-clock rates, it is possible to achieve lower sample rates without running into -the constraints of higher decimations, simply by choosing a lower master-clock rate to keep required decimation below 128. +the constraints of higher decimation rates, simply by choosing a lower master-clock rate to keep required decimation below 128. \subsection general_sampleratenotes_automatic Automatic master-clock selection |