Merge branch 'master' into usrp2p

this was the merge from hell

Conflicts:

	firmware/microblaze/Makefile.am
	firmware/microblaze/bootstrap
	firmware/microblaze/configure.ac
	firmware/microblaze/lib/Makefile.inc
	host/lib/CMakeLists.txt
	host/lib/usrp/mimo_usrp.cpp
	host/lib/usrp/simple_usrp.cpp
	host/lib/usrp/usrp2/clock_ctrl.cpp
	host/lib/usrp/usrp2/codec_impl.cpp
	host/lib/usrp/usrp2/dboard_impl.cpp
	host/lib/usrp/usrp2/mboard_impl.cpp
	host/lib/usrp/usrp2/usrp2_iface.hpp
	host/lib/usrp/usrp2/usrp2_impl.hpp
	host/lib/usrp/usrp2/usrp2_regs.hpp
	host/test/CMakeLists.txt

1 files changed, 56 insertions, 2 deletions

diff --git a/host/docs/dboards.rst b/host/docs/dboards.rst
index 9c496ebee..b66fd2069 100644
--- a/host/docs/dboards.rst
+++ b/host/docs/dboards.rst
@@ -32,7 +32,20 @@ The Basic TX and LFTX boards have 1 quadrature subdevice using both antennas.
 
 The boards have no tunable elements or programmable gains.
 Though the magic of aliasing, you can up-convert signals
-greater than the nyquist rate of the DAC.
+greater than the Nyquist rate of the DAC.
+
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+DBSRX
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+The DBSRX board has 1 quadrature subdevice.
+
+Receive Antennas: **J3**
+
+The board has no user selectable antenna setting
+
+Recieve Gains: 
+    **GC1**, Range: 0-56dB
+    **GC2**, Range: 0-24dB
 
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
 RFX Series
@@ -45,7 +58,7 @@ The user may set the receive antenna to be TX/RX or RX2.
 However, when using an RFX board in full-duplex mode,
 the receive antenna will always be set to RX2, regardless of the settings.
 
-Recieve Gains: **PGA0**, Range: 0-45dB
+Recieve Gains: **PGA0**, Range: 0-70dB (except RFX400 range is 0-45dB)
 
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
 XCVR 2450
@@ -87,3 +100,44 @@ the receive antenna will always be set to RX2, regardless of the settings.
 Transmit Gains: **PGA0**, Range: 0-25dB
 
 Recieve Gains: **PGA0**, Range: 0-31.5dB
+
+------------------------------------------------------------------------
+Daughterboard Modifications
+------------------------------------------------------------------------
+
+Sometimes, daughterboards will require modification
+to work on certain frequencies or to work with certain hardware.
+Modification usually involves moving/removing a SMT component
+and burning a new daughterboard id into the eeprom.
+
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+DBSRX
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Due to different clocking capabilities,
+the DBSRX will require modifications to operate on a non-USRP1 motherboard.
+On a USRP1 motherboard, a divided clock is provided from an FPGA pin
+because the standard daughterboard clock lines cannot provided a divided clock.
+However, on other USRP motherboards, the divided clock is provided
+over the standard daughterboard clock lines.
+
+**Step 1: Move the clock configuration resistor**
+
+Remove R193 (which is 10 ohms, 0603 size) and put it on R194, which is empty.
+This is made somewhat more complicated by the fact that the silkscreen is not clear in that area.
+R193 is on the back, immediately below the large beige connector, J2.
+R194 is just below, and to the left of R193.
+The silkscreen for R193 is ok, but for R194,
+it is upside down, and partially cut off.
+If you lose R193, you can use anything from 0 to 10 ohms there.
+
+**Step 2: Burn a new daughterboard id into the EEPROM**
+
+With the daughterboard plugged-in, run the following commands:
+::
+
+    cd <prefix>/share/uhd/utils
+    ./usrp_burn_db_eeprom --id=0x000d --unit=RX --args=<args> --db=<db>
+
+* <args> are device address arguments (optional if only one USRP is on your machine)
+* <db> is the name of the daughterboard slot (optional if the USRP has only one slot)