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authorWade Fife <wade.fife@ettus.com>2020-07-02 13:50:23 -0500
committerWade Fife <wade.fife@ettus.com>2020-07-20 15:33:22 -0500
commite962cc4a5e51e2326eb656ee2a779ea26774687b (patch)
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fpga: rfnoc: Fix testbenches to run under ModelSim
This updates the makefiles for the testbenches so they can be run using "make modelsim" without any additional hacks. The "xsim" and "vsim" simulation targets also still work.
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