Test program to verify GPIO on daughterboards. For success, connect gpios on

TX to corresponding ones on RX.

3 files changed, 94 insertions, 7 deletions

diff --git a/host/apps/omap_debug/Makefile b/host/apps/omap_debug/Makefile
index cd95d36fc..31229d45c 100644
--- a/host/apps/omap_debug/Makefile
+++ b/host/apps/omap_debug/Makefile
@@ -1,6 +1,6 @@
 CFLAGS=-Wall -I../../lib/usrp/usrp_e/
 
-all : usrp-e-spi usrp-e-i2c usrp-e-rw usrp-e-uart usrp-e-led usrp-e-ctl usrp-e-button usrp-e-uart-rx fpga-downloader
+all : usrp-e-spi usrp-e-i2c usrp-e-rw usrp-e-uart usrp-e-led usrp-e-ctl usrp-e-button usrp-e-uart-rx fpga-downloader usrp-e-gpio
 
 usrp-e-spi : usrp-e-spi.c
 
@@ -21,6 +21,8 @@ usrp-e-button : usrp-e-button.c
 
 fpga-downloader : fpga-downloader.cc
 
+usrp-e-gpio : usrp-e-gpio.c
+
 clean :
 	rm -f usrp-e-spi
 	rm -f usrp-e-i2c
@@ -31,3 +33,4 @@ clean :
 	rm -f usrp-e-ctl
 	rm -f usrp-e-button
 	rm -f fpga-downloader
+	rm -f usrp-e-gpio
diff --git a/host/apps/omap_debug/set_debug_pins.py b/host/apps/omap_debug/set_debug_pins.py
index fdd085c9e..0f9ecd7b9 100755
--- a/host/apps/omap_debug/set_debug_pins.py
+++ b/host/apps/omap_debug/set_debug_pins.py
@@ -3,12 +3,12 @@
 import os
 
 # Memory Map
-misc_base = 0 << 7
-uart_base = 1 << 7
-spi_base = 2 << 7
-i2c_base = 3 << 7
-gpio_base = 4 << 7
-settings_base = 5 << 7
+misc_base = 0
+uart_base = 1
+spi_base = 2
+i2c_base = 3
+gpio_base = 4 * 128
+settings_base = 5
 
 # GPIO offset
 gpio_pins = 0
@@ -32,3 +32,4 @@ set_reg(gpio_base+gpio_ctrl_lo, 0xAAAA)
 set_reg(gpio_base+gpio_ctrl_lo+2, 0xAAAA)
 set_reg(gpio_base+gpio_ctrl_hi, 0xAAAA)
 set_reg(gpio_base+gpio_ctrl_hi+2, 0xAAAA)
+
diff --git a/host/apps/omap_debug/usrp-e-gpio.c b/host/apps/omap_debug/usrp-e-gpio.c
new file mode 100644
index 000000000..adef877d3
--- /dev/null
+++ b/host/apps/omap_debug/usrp-e-gpio.c
@@ -0,0 +1,83 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <sys/types.h>
+#include <fcntl.h>
+#include <string.h>
+#include <sys/ioctl.h>
+
+#include "usrp_e.h"
+#include "usrp_e_regs.hpp"
+
+// Usage: usrp_e_gpio <string>
+
+static int fp;
+
+static int read_reg(__u16 reg)
+{
+	int ret;
+	struct usrp_e_ctl16 d;
+
+	d.offset = reg;
+	d.count = 1;
+	ret = ioctl(fp, USRP_E_READ_CTL16, &d);
+	return d.buf[0];
+}
+
+static void write_reg(__u16 reg, __u16 val)
+{
+	int ret;
+	struct usrp_e_ctl16 d;
+
+	d.offset = reg;
+	d.count = 1;
+	d.buf[0] = val;
+	ret = ioctl(fp, USRP_E_WRITE_CTL16, &d);
+}
+
+int main(int argc, char *argv[])
+{
+	int i, test, data_in;
+
+	test = 0;
+	if (argc > 1)
+		test = 1;
+
+	fp = open("/dev/usrp_e0", O_RDWR);
+	printf("fp = %d\n", fp);
+
+	write_reg(UE_REG_GPIO_TX_DDR, 0x0);
+	write_reg(UE_REG_GPIO_RX_DDR, 0xFFFF);
+
+	for (i=0; i < 16; i++) {
+		write_reg(UE_REG_GPIO_RX_IO, 1 << i);
+		sleep(1);
+		if (test) {
+			data_in = read_reg(UE_REG_GPIO_TX_IO);
+			if (data_in != (1 << i))
+				printf("Read failed, wrote: %X read: %X\n", \
+					1 << i, data_in);
+		}
+	}
+
+	write_reg(UE_REG_GPIO_RX_DDR, 0x0);
+	write_reg(UE_REG_GPIO_TX_DDR, 0xFFFF);
+
+	sleep(1);
+
+	for (i=0; i < 16; i++) {
+		write_reg(UE_REG_GPIO_TX_IO, 1 << i);
+		sleep(1);
+		if (test) {
+			data_in = read_reg(UE_REG_GPIO_RX_IO);
+			if (data_in != (1 << i))
+				printf("Read failed, wrote: %X read: %X\n", \
+					1 << i, data_in);
+		}
+	}
+
+	write_reg(UE_REG_GPIO_RX_DDR, 0x0);
+	write_reg(UE_REG_GPIO_TX_DDR, 0x0);
+
+	return 0;
+}