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| author | Thomas Tsou <ttsou@vt.edu> | 2010-08-19 19:33:18 -0700 |
|---|---|---|
| committer | Thomas Tsou <ttsou@vt.edu> | 2010-08-19 19:33:18 -0700 |
| commit | f41cdf4eeb31a2fed2a93b23e0fbe5f3b2142296 (patch) | |
| tree | 4ef9b7cbe4ca3fdee666789bbfd53354cf7b3bc1 /fpga | |
| parent | dafbb2c047fc0878288a67ec161c7c2735e1dcb8 (diff) | |
| download | uhd-f41cdf4eeb31a2fed2a93b23e0fbe5f3b2142296.tar.gz uhd-f41cdf4eeb31a2fed2a93b23e0fbe5f3b2142296.tar.bz2 uhd-f41cdf4eeb31a2fed2a93b23e0fbe5f3b2142296.zip | |
usrp1: Change codec transmit gain scaling
The AD9862 datasheet states that maximum gain is achieved with
a value of 111111 (0x3f), however, empirical testing reveals that
the gain scaling value spans the full register width of 8-bits.
Diffstat (limited to 'fpga')
0 files changed, 0 insertions, 0 deletions