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| author | Josh Blum <josh@joshknows.com> | 2012-03-26 14:25:56 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2012-03-26 17:51:27 -0700 |
| commit | 097f20df1653c33035b6dcfefbbef22572426c65 (patch) | |
| tree | b25c4800f475f3d66e0fdeda21ee3c7c0ea4ab3e /fpga | |
| parent | 277d4d2f76b163a954ff99e10b299c39e03b53bb (diff) | |
| download | uhd-097f20df1653c33035b6dcfefbbef22572426c65.tar.gz uhd-097f20df1653c33035b6dcfefbbef22572426c65.tar.bz2 uhd-097f20df1653c33035b6dcfefbbef22572426c65.zip | |
dbsrx: limit the USRP1 + DBSRX GPIO clock rate to 4MHz
This fixes the lockup/clocking condition when the following hw combo is used:
USRP1 r4.5 + DBSRX + another i2c board
Diffstat (limited to 'fpga')
0 files changed, 0 insertions, 0 deletions