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author | Josh Blum <josh@joshknows.com> | 2011-01-14 15:22:02 -0800 |
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committer | Josh Blum <josh@joshknows.com> | 2011-01-14 15:22:02 -0800 |
commit | 1254656ef914482cc111ffa3aca48be5c1e8caaf (patch) | |
tree | 0833ee4271c99efce01ac8944a8ea5c3c241e94b /fpga | |
parent | d7a8b451d27553b0313917e66255214822ed492b (diff) | |
download | uhd-1254656ef914482cc111ffa3aca48be5c1e8caaf.tar.gz uhd-1254656ef914482cc111ffa3aca48be5c1e8caaf.tar.bz2 uhd-1254656ef914482cc111ffa3aca48be5c1e8caaf.zip |
usrp-e100: added readback mux 32 as slave 7 for time readback
created new component wb_readback_mux_16LE.v for 16 wide bus
connected vita time pps to vita time controller and readbacks
Diffstat (limited to 'fpga')
0 files changed, 0 insertions, 0 deletions