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authorWade Fife <wade.fife@ettus.com>2021-08-25 09:24:05 -0500
committerWade Fife <wade.fife@ettus.com>2021-08-30 08:20:10 -0500
commitc176046dff4941bcec27b0b72e5a68264c4808e5 (patch)
treef8736cfb5e496f855fdb83109cb39f1fba6c9b44 /fpga
parent2680025c1b8ac51812931d78b2e0a4777f8e1774 (diff)
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fpga: Set default part for sim in setupenv.sh
This sets the ARCH and PART_ID environment variables so that the selected part family is used for simulations by default. This can be overridden by changing them in the Makefile for the testbench if a testbench requires a specific part family. Prior to this change, the default was always ARCH=kintex7, PART_ID=xc7k410t/ffg900/-2, which required support for that part to be installed.
Diffstat (limited to 'fpga')
-rw-r--r--fpga/usrp3/tools/make/viv_sim_preamble.mak9
-rw-r--r--fpga/usrp3/top/e31x/setupenv.sh4
-rw-r--r--fpga/usrp3/top/e320/setupenv.sh4
-rw-r--r--fpga/usrp3/top/n3xx/setupenv.sh4
-rw-r--r--fpga/usrp3/top/x300/setupenv.sh4
-rw-r--r--fpga/usrp3/top/x400/setupenv.sh4
6 files changed, 24 insertions, 5 deletions
diff --git a/fpga/usrp3/tools/make/viv_sim_preamble.mak b/fpga/usrp3/tools/make/viv_sim_preamble.mak
index 514b06a0a..f7dfd4503 100644
--- a/fpga/usrp3/tools/make/viv_sim_preamble.mak
+++ b/fpga/usrp3/tools/make/viv_sim_preamble.mak
@@ -12,13 +12,12 @@ SIM_RUNTIME_US = 1000000000
# Define part using PART_ID (<device>/<package>/<speedgrade>)
# and architecture (zynq, kintex7, or artix7)
-#
-# Most simulations are part agnostic, but the user can override
+#
+# Most simulations are part agnostic, but the user can override
# these if needed in the makefile in the simulation directory
#
-# TODO : Update to set from setupenv.sh
ARCH ?= kintex7
-PART_ID ?= xc7k410t/ffg900/-2
+PART_ID ?= xc7k410t/ffg900/-2
# Include makefiles and sources for the DUT and its dependencies
include $(BASE_DIR)/../lib/sim/Makefile.srcs
@@ -48,7 +47,7 @@ vars::
env
@echo "ARCH=$(ARCH)"
@echo "PART_ID=$(PART_ID)"
-
+
all:
$(error "all" or "<empty>" is not a valid target. Run make help for a list of supported targets.)
diff --git a/fpga/usrp3/top/e31x/setupenv.sh b/fpga/usrp3/top/e31x/setupenv.sh
index 940ccede2..b7023f2de 100644
--- a/fpga/usrp3/top/e31x/setupenv.sh
+++ b/fpga/usrp3/top/e31x/setupenv.sh
@@ -8,4 +8,8 @@ declare -A PRODUCT_ID_MAP
PRODUCT_ID_MAP["E310_SG1"]="zynq/xc7z020/clg484/-1"
PRODUCT_ID_MAP["E310_SG3"]="zynq/xc7z020/clg484/-3"
+# Set default part for simulation
+export ARCH=zynq
+export PART_ID="xc7z020/clg484/-3"
+
source $REPO_BASE_PATH/tools/scripts/setupenv_base.sh
diff --git a/fpga/usrp3/top/e320/setupenv.sh b/fpga/usrp3/top/e320/setupenv.sh
index 76bf520ed..13f0b3b45 100644
--- a/fpga/usrp3/top/e320/setupenv.sh
+++ b/fpga/usrp3/top/e320/setupenv.sh
@@ -7,4 +7,8 @@ REPO_BASE_PATH=$(cd "$(dirname "${BASH_SOURCE[0]}")/../.." && pwd)
declare -A PRODUCT_ID_MAP
PRODUCT_ID_MAP["E320"]="zynq/xc7z045/ffg900/-3"
+# Set default part for simulation
+export ARCH=zynq
+export PART_ID="xc7z045/ffg900/-3"
+
source $REPO_BASE_PATH/tools/scripts/setupenv_base.sh
diff --git a/fpga/usrp3/top/n3xx/setupenv.sh b/fpga/usrp3/top/n3xx/setupenv.sh
index 0be100b62..bb20a330c 100644
--- a/fpga/usrp3/top/n3xx/setupenv.sh
+++ b/fpga/usrp3/top/n3xx/setupenv.sh
@@ -10,4 +10,8 @@ PRODUCT_ID_MAP["N310"]="zynq/xc7z100/ffg900/-2"
PRODUCT_ID_MAP["N320"]="zynq/xc7z100/ffg900/-2"
PRODUCT_ID_MAP["EISCAT"]="zynq/xc7z100/ffg900/-2"
+# Set default part for simulation
+export ARCH=zynq
+export PART_ID="xc7z100/ffg900/-2"
+
source $REPO_BASE_PATH/tools/scripts/setupenv_base.sh
diff --git a/fpga/usrp3/top/x300/setupenv.sh b/fpga/usrp3/top/x300/setupenv.sh
index 829628690..6065a5c06 100644
--- a/fpga/usrp3/top/x300/setupenv.sh
+++ b/fpga/usrp3/top/x300/setupenv.sh
@@ -8,4 +8,8 @@ declare -A PRODUCT_ID_MAP
PRODUCT_ID_MAP["X300"]="kintex7/xc7k325t/ffg900/-2"
PRODUCT_ID_MAP["X310"]="kintex7/xc7k410t/ffg900/-2"
+# Set default part for simulation
+export ARCH=kintex7
+export PART_ID="xc7k410t/ffg900/-2"
+
source $REPO_BASE_PATH/tools/scripts/setupenv_base.sh
diff --git a/fpga/usrp3/top/x400/setupenv.sh b/fpga/usrp3/top/x400/setupenv.sh
index 38bed74df..80da9448d 100644
--- a/fpga/usrp3/top/x400/setupenv.sh
+++ b/fpga/usrp3/top/x400/setupenv.sh
@@ -13,4 +13,8 @@ REPO_BASE_PATH=$(cd "$(dirname "${BASH_SOURCE[0]}")/../.." && pwd)
declare -A PRODUCT_ID_MAP
PRODUCT_ID_MAP["X410"]="zynquplusRFSOC/xczu28dr/ffvg1517/-1/e"
+# Set default part for simulation
+export ARCH=zynquplusRFSOC
+export PART_ID="xczu28dr/ffvg1517/-1/e"
+
source $REPO_BASE_PATH/tools/scripts/setupenv_base.sh