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authorWade Fife <wade.fife@ettus.com>2021-06-08 19:42:05 -0500
committerAaron Rossetto <aaron.rossetto@ni.com>2021-06-10 11:56:58 -0500
commit791bafd09a30a041a0c6f65dbf395cc4e567911f (patch)
tree57ad145a0c5b8875dbcfa187e5fa7e9561bce728 /fpga
parentb0033158a4c520063540881451d8daac91e98714 (diff)
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fpga: lib: Update register comments in eth_regs.vh
Diffstat (limited to 'fpga')
-rw-r--r--fpga/usrp3/lib/rfnoc/xport_sv/eth_regs.vh6
1 files changed, 5 insertions, 1 deletions
diff --git a/fpga/usrp3/lib/rfnoc/xport_sv/eth_regs.vh b/fpga/usrp3/lib/rfnoc/xport_sv/eth_regs.vh
index 96e9ce53f..4a8a50046 100644
--- a/fpga/usrp3/lib/rfnoc/xport_sv/eth_regs.vh
+++ b/fpga/usrp3/lib/rfnoc/xport_sv/eth_regs.vh
@@ -12,10 +12,14 @@
// REG_AWIDTH - How wide the register window is in bits
// BASE - Base address added to the offsets here
// REGISTER OFFSETS
-// Allocate one full page for MAC
+
+// Allocate one full page for MAC starting ox 0x0000
+// This is the location of MAC address in XGE.
+// It is shadowed in the ethifc.
localparam [REG_AWIDTH-1:0] REG_MAC_LSB = BASE + 'h0000;
localparam [REG_AWIDTH-1:0] REG_MAC_MSB = BASE + 'h0004;
+// UIO Registers
// Source IP address
localparam [REG_AWIDTH-1:0] REG_IP = BASE + 'h1000;
// Source UDP Port