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authorAndrew Moch <Andrew.Moch@ni.com>2020-09-16 17:20:05 +0100
committerWade Fife <wade.fife@ettus.com>2020-09-16 17:23:23 -0500
commit6cd9662e2b8f2e159805015f3dd9087089a454af (patch)
treeab7a9bfebec01c09db70bafb78c5843f0707a93a /fpga
parentb067b2af7924aa8577a8619f97d54122e0b71daf (diff)
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fpga: lib: Fix 10 GbE cut-through mode
When operating in cut-through mode the hold off from the MAC was not applying back pressure, so when the TX interface filled up, data was dropped. This bug was introduced when cut-through was added, and does not impact the original implementation.
Diffstat (limited to 'fpga')
-rw-r--r--fpga/usrp3/lib/xge_interface/xge_mac_wrapper.v20
1 files changed, 16 insertions, 4 deletions
diff --git a/fpga/usrp3/lib/xge_interface/xge_mac_wrapper.v b/fpga/usrp3/lib/xge_interface/xge_mac_wrapper.v
index 4b75897aa..143808f6d 100644
--- a/fpga/usrp3/lib/xge_interface/xge_mac_wrapper.v
+++ b/fpga/usrp3/lib/xge_interface/xge_mac_wrapper.v
@@ -433,6 +433,7 @@ module xge_mac_wrapper #(
// add cut through if we have "enough" data buffered up
//
reg cut_through;
+ reg cut_wait;
if (CUT_THROUGH > 0) begin : yes_cut_through
@@ -446,7 +447,9 @@ module xge_mac_wrapper #(
always @(posedge xgmii_clk) begin : cut_through_dff
if (xgmii_reset) begin
cut_through <= 1'b0;
+ cut_wait <= 1'b0;
end else begin
+ cut_wait <= eth_tx_full;
if (cut_start) begin
cut_through <= 1'b1;
end else if (cut_end) begin
@@ -455,7 +458,10 @@ module xge_mac_wrapper #(
end
end
end else begin : no_cut_through
- always @(*) cut_through <= 0;
+ always @(*) begin
+ cut_through <= 0;
+ cut_wait <= 0;
+ end
end
//
@@ -478,8 +484,14 @@ module xge_mac_wrapper #(
//
// Suppress FIFO flags to stop overflow of MAC in Tx direction
//
- assign tx_tready_int3 = (enable_tx || cut_through);
- assign eth_tx_valid = (enable_tx || cut_through) & tx_tvalid_int3;
- assign eth_tx_sof = (enable_tx || cut_through) & tx_sof_int3;
+ if (CUT_THROUGH > 0) begin : yes_cut_through_ready
+ assign tx_tready_int3 = (cut_through && !(cut_wait));
+ assign eth_tx_valid = (cut_through && !(cut_wait)) & tx_tvalid_int3;
+ assign eth_tx_sof = (cut_through && !(cut_wait)) & tx_sof_int3;
+ end else begin : no_cut_through_ready
+ assign tx_tready_int3 = enable_tx;
+ assign eth_tx_valid = enable_tx & tx_tvalid_int3;
+ assign eth_tx_sof = enable_tx & tx_sof_int3;
+ end
endmodule