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author | Max Köhler <max.koehler@ni.com> | 2020-05-22 22:01:13 +0200 |
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committer | Wade Fife <wade.fife@ettus.com> | 2020-06-04 14:46:19 -0500 |
commit | 427a3939da459d6fb786a274ee04e28c950b71fd (patch) | |
tree | c14a522802018c5790b89145dbc70f805339ccc3 /fpga | |
parent | 3f6ad749b06094b0e16b412a791ba3f2ac509600 (diff) | |
download | uhd-427a3939da459d6fb786a274ee04e28c950b71fd.tar.gz uhd-427a3939da459d6fb786a274ee04e28c950b71fd.tar.bz2 uhd-427a3939da459d6fb786a274ee04e28c950b71fd.zip |
fpga: lib: extend wb_spi ability to limit transmission length
Diffstat (limited to 'fpga')
-rw-r--r-- | fpga/usrp3/lib/wb_spi/rtl/verilog/spi_defines.v | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/fpga/usrp3/lib/wb_spi/rtl/verilog/spi_defines.v b/fpga/usrp3/lib/wb_spi/rtl/verilog/spi_defines.v index 28b4f2fd3..2b10e68cb 100644 --- a/fpga/usrp3/lib/wb_spi/rtl/verilog/spi_defines.v +++ b/fpga/usrp3/lib/wb_spi/rtl/verilog/spi_defines.v @@ -62,12 +62,18 @@ `endif // -// Maximum nuber of bits that can be send/received at once. +// Maximum number of bits that can be send/received at once. // Use SPI_MAX_CHAR for fine tuning the exact number, when using // SPI_MAX_CHAR_32, SPI_MAX_CHAR_24, SPI_MAX_CHAR_16, SPI_MAX_CHAR_8. // -`ifndef SPI_MAX_CHAR_64 - `define SPI_MAX_CHAR_128 +`ifndef SPI_MAX_CHAR_8 + `ifndef SPI_MAX_CHAR_16 + `ifndef SPI_MAX_CHAR_32 + `ifndef SPI_MAX_CHAR_64 + `define SPI_MAX_CHAR_128 + `endif + `endif + `endif `endif //`define SPI_MAX_CHAR_64 //`define SPI_MAX_CHAR_32 |