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author | Josh Blum <josh@joshknows.com> | 2012-03-23 12:14:51 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2012-03-23 12:14:51 -0700 |
commit | b60fccc51495a84a5c434c4e612170e4a75faf12 (patch) | |
tree | db983533cdcc7f513ced239883b71a1f7e0f29f3 /fpga | |
parent | ea19de0ba230b738a102d4ebb089614bd3ca2fa0 (diff) | |
download | uhd-b60fccc51495a84a5c434c4e612170e4a75faf12.tar.gz uhd-b60fccc51495a84a5c434c4e612170e4a75faf12.tar.bz2 uhd-b60fccc51495a84a5c434c4e612170e4a75faf12.zip |
usrp: fix for rx_frontend_core_200 dc offset
Mask off upper bits when setting a constant offset (I and Q regs).
The sign bits (if negative) can flow off into the flags field.
Diffstat (limited to 'fpga')
0 files changed, 0 insertions, 0 deletions