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authormichael-west <michael.west@ettus.com>2014-08-08 17:40:54 -0700
committerMartin Braun <martin.braun@ettus.com>2014-08-18 22:52:53 +0200
commit8055ac0d4f10c8c13709d49fedcc66615e472a79 (patch)
tree0e47c9967061e45f22630c5e8e4e8ab7288be317 /fpga
parent7297ebffc344cce30f2570b1587beae94adeed1e (diff)
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- Fixes for channel alignment
- Added analog delay for radio clock - Added analog delay for DAC reference clocks - Removed resetting of clock control - Removed setting of reference clock and PPS to external sources during initialization - Fixes for set_time_unknown_pps - Removed wait for PPS edge after setting time from GPSDO - Changed set_time_unknonw_pps to time out based on system time rather than device VITA time
Diffstat (limited to 'fpga')
0 files changed, 0 insertions, 0 deletions