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authorAshish Chaudhari <ashish@ettus.com>2014-08-01 13:14:56 -0700
committerAshish Chaudhari <ashish@ettus.com>2014-08-01 13:14:56 -0700
commitc7274790a0b8a812d731320c2b7711efa2e1daa7 (patch)
treea4e341ffb7e441cf92d903c7dcb263aacf43d9ca /fpga
parent9eb403f4299ea036a8fff2dc22209d3ae06374ed (diff)
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b200: Moved AD9361 driver to host
- Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow
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