diff options
| author | Javier Valenzuela <javier.valenzuela@ni.com> | 2022-02-10 12:16:22 -0600 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2022-02-10 13:18:58 -0700 |
| commit | cdcd39aeb508298e28e8a2a89db5ab9fefd70435 (patch) | |
| tree | 3098ba374b952a8eb2529b18a99c89520e9aab19 /fpga/usrp3 | |
| parent | ac286920f0d4f3b7b26ea3cfc7a9e11ae10346d1 (diff) | |
| download | uhd-cdcd39aeb508298e28e8a2a89db5ab9fefd70435.tar.gz uhd-cdcd39aeb508298e28e8a2a89db5ab9fefd70435.tar.bz2 uhd-cdcd39aeb508298e28e8a2a89db5ab9fefd70435.zip | |
fpga: x400: Add DRAM enable macro
Diffstat (limited to 'fpga/usrp3')
| -rw-r--r-- | fpga/usrp3/top/x400/x4xx_core.v | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/fpga/usrp3/top/x400/x4xx_core.v b/fpga/usrp3/top/x400/x4xx_core.v index c9ab18e96..df60b8a90 100644 --- a/fpga/usrp3/top/x400/x4xx_core.v +++ b/fpga/usrp3/top/x400/x4xx_core.v @@ -394,6 +394,10 @@ module x4xx_core #( // DRAM //--------------------------------------------------------------------------- + `ifndef ENABLE_DRAM + `define ENABLE_DRAM 0 + `endif + // Only the 100 and 200 MHz images currently support DRAM due to FPGA // resource limitations. For 200 MHz and below, a 64-bit interface provides // sufficient bandwidth. |