diff options
author | Wade Fife <wade.fife@ettus.com> | 2022-04-05 17:57:45 -0500 |
---|---|---|
committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2022-04-06 14:49:49 -0700 |
commit | 41aadb29b952d563bf78c38b7bfd408d2f1d2519 (patch) | |
tree | f4d51dd1b9376159440fd952c08caccc9a101390 /fpga/usrp3/top | |
parent | 1380b91e542d1280372de6fa8d712574692e9e66 (diff) | |
download | uhd-41aadb29b952d563bf78c38b7bfd408d2f1d2519.tar.gz uhd-41aadb29b952d563bf78c38b7bfd408d2f1d2519.tar.bz2 uhd-41aadb29b952d563bf78c38b7bfd408d2f1d2519.zip |
fpga: x400: Increase replay SEP buffer sizes
Diffstat (limited to 'fpga/usrp3/top')
-rw-r--r-- | fpga/usrp3/top/x400/x410_100_rfnoc_image_core.v | 14 | ||||
-rw-r--r-- | fpga/usrp3/top/x400/x410_100_rfnoc_image_core.vh | 6 | ||||
-rw-r--r-- | fpga/usrp3/top/x400/x410_100_rfnoc_image_core.yml | 8 | ||||
-rw-r--r-- | fpga/usrp3/top/x400/x410_200_rfnoc_image_core.v | 14 | ||||
-rw-r--r-- | fpga/usrp3/top/x400/x410_200_rfnoc_image_core.vh | 6 | ||||
-rw-r--r-- | fpga/usrp3/top/x400/x410_200_rfnoc_image_core.yml | 8 |
6 files changed, 28 insertions, 28 deletions
diff --git a/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.v b/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.v index 968361f4e..520ced73f 100644 --- a/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.v +++ b/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.v @@ -13,9 +13,9 @@ // This file was automatically generated by the RFNoC image builder tool. // Re-running that tool will overwrite this file! // -// File generated on: 2022-03-29T22:54:34.224724 -// Source: x410_100_rfnoc_image_core.yml -// Source SHA256: 9e62fec6fb4c74b9aedd932cb474c3eac35f1455a9947cd72c82d3d3eff505d7 +// File generated on: 2022-04-05T20:50:53.054444 +// Source: ./x410_100_rfnoc_image_core.yml +// Source SHA256: 73ccfd5525b2438c74beb7694091d456ae10bff92ceaab68946dd8b00a052ea0 // `default_nettype none @@ -569,7 +569,7 @@ module rfnoc_image_core #( // If requested buffer size is 0, use the minimum SRL-based FIFO size. // Otherwise, make sure it's at least two MTU-sized packets. - localparam REQ_BUFF_SIZE_EP4 = (16384)/(CHDR_W/8); + localparam REQ_BUFF_SIZE_EP4 = (32768)/(CHDR_W/8); localparam INGRESS_BUFF_SIZE_EP4 = REQ_BUFF_SIZE_EP4 == 0 ? 5 : REQ_BUFF_SIZE_EP4 < 2*(2**MTU) ? MTU+1 : @@ -638,7 +638,7 @@ module rfnoc_image_core #( // If requested buffer size is 0, use the minimum SRL-based FIFO size. // Otherwise, make sure it's at least two MTU-sized packets. - localparam REQ_BUFF_SIZE_EP5 = (16384)/(CHDR_W/8); + localparam REQ_BUFF_SIZE_EP5 = (32768)/(CHDR_W/8); localparam INGRESS_BUFF_SIZE_EP5 = REQ_BUFF_SIZE_EP5 == 0 ? 5 : REQ_BUFF_SIZE_EP5 < 2*(2**MTU) ? MTU+1 : @@ -707,7 +707,7 @@ module rfnoc_image_core #( // If requested buffer size is 0, use the minimum SRL-based FIFO size. // Otherwise, make sure it's at least two MTU-sized packets. - localparam REQ_BUFF_SIZE_EP6 = (16384)/(CHDR_W/8); + localparam REQ_BUFF_SIZE_EP6 = (32768)/(CHDR_W/8); localparam INGRESS_BUFF_SIZE_EP6 = REQ_BUFF_SIZE_EP6 == 0 ? 5 : REQ_BUFF_SIZE_EP6 < 2*(2**MTU) ? MTU+1 : @@ -776,7 +776,7 @@ module rfnoc_image_core #( // If requested buffer size is 0, use the minimum SRL-based FIFO size. // Otherwise, make sure it's at least two MTU-sized packets. - localparam REQ_BUFF_SIZE_EP7 = (16384)/(CHDR_W/8); + localparam REQ_BUFF_SIZE_EP7 = (32768)/(CHDR_W/8); localparam INGRESS_BUFF_SIZE_EP7 = REQ_BUFF_SIZE_EP7 == 0 ? 5 : REQ_BUFF_SIZE_EP7 < 2*(2**MTU) ? MTU+1 : diff --git a/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.vh b/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.vh index 1502b6bc8..18ac77d8d 100644 --- a/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.vh +++ b/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.vh @@ -12,9 +12,9 @@ // This file was automatically generated by the RFNoC image builder tool. // Re-running that tool will overwrite this file! // -// File generated on: 2022-03-29T22:54:34.258722 -// Source: x410_100_rfnoc_image_core.yml -// Source SHA256: 9e62fec6fb4c74b9aedd932cb474c3eac35f1455a9947cd72c82d3d3eff505d7 +// File generated on: 2022-04-05T20:50:53.089049 +// Source: ./x410_100_rfnoc_image_core.yml +// Source SHA256: 73ccfd5525b2438c74beb7694091d456ae10bff92ceaab68946dd8b00a052ea0 // `define CHDR_WIDTH 64 diff --git a/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.yml b/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.yml index 69f53ea7f..78c0b3cb9 100644 --- a/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.yml +++ b/fpga/usrp3/top/x400/x410_100_rfnoc_image_core.yml @@ -34,19 +34,19 @@ stream_endpoints: ep4: ctrl: False data: True - buff_size_bytes: 16384 + buff_size_bytes: 32768 ep5: ctrl: False data: True - buff_size_bytes: 16384 + buff_size_bytes: 32768 ep6: ctrl: False data: True - buff_size_bytes: 16384 + buff_size_bytes: 32768 ep7: ctrl: False data: True - buff_size_bytes: 16384 + buff_size_bytes: 32768 # A list of all NoC blocks in design # ---------------------------------- diff --git a/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.v b/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.v index 8b8126bd6..959d5d3f8 100644 --- a/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.v +++ b/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.v @@ -13,9 +13,9 @@ // This file was automatically generated by the RFNoC image builder tool. // Re-running that tool will overwrite this file! // -// File generated on: 2022-03-29T22:54:34.653995 -// Source: x410_200_rfnoc_image_core.yml -// Source SHA256: 2f39eb00e4449ba15add66b6a3921d729afa21f8c34d609b82ca51d6b4ab8bec +// File generated on: 2022-04-05T20:50:48.332788 +// Source: ./x410_200_rfnoc_image_core.yml +// Source SHA256: 69661f9e2e1c218f3c199f2c8017b4b83f8b53eb47af157d455e27f719902f6b // `default_nettype none @@ -569,7 +569,7 @@ module rfnoc_image_core #( // If requested buffer size is 0, use the minimum SRL-based FIFO size. // Otherwise, make sure it's at least two MTU-sized packets. - localparam REQ_BUFF_SIZE_EP4 = (16384)/(CHDR_W/8); + localparam REQ_BUFF_SIZE_EP4 = (32768)/(CHDR_W/8); localparam INGRESS_BUFF_SIZE_EP4 = REQ_BUFF_SIZE_EP4 == 0 ? 5 : REQ_BUFF_SIZE_EP4 < 2*(2**MTU) ? MTU+1 : @@ -638,7 +638,7 @@ module rfnoc_image_core #( // If requested buffer size is 0, use the minimum SRL-based FIFO size. // Otherwise, make sure it's at least two MTU-sized packets. - localparam REQ_BUFF_SIZE_EP5 = (16384)/(CHDR_W/8); + localparam REQ_BUFF_SIZE_EP5 = (32768)/(CHDR_W/8); localparam INGRESS_BUFF_SIZE_EP5 = REQ_BUFF_SIZE_EP5 == 0 ? 5 : REQ_BUFF_SIZE_EP5 < 2*(2**MTU) ? MTU+1 : @@ -707,7 +707,7 @@ module rfnoc_image_core #( // If requested buffer size is 0, use the minimum SRL-based FIFO size. // Otherwise, make sure it's at least two MTU-sized packets. - localparam REQ_BUFF_SIZE_EP6 = (16384)/(CHDR_W/8); + localparam REQ_BUFF_SIZE_EP6 = (32768)/(CHDR_W/8); localparam INGRESS_BUFF_SIZE_EP6 = REQ_BUFF_SIZE_EP6 == 0 ? 5 : REQ_BUFF_SIZE_EP6 < 2*(2**MTU) ? MTU+1 : @@ -776,7 +776,7 @@ module rfnoc_image_core #( // If requested buffer size is 0, use the minimum SRL-based FIFO size. // Otherwise, make sure it's at least two MTU-sized packets. - localparam REQ_BUFF_SIZE_EP7 = (16384)/(CHDR_W/8); + localparam REQ_BUFF_SIZE_EP7 = (32768)/(CHDR_W/8); localparam INGRESS_BUFF_SIZE_EP7 = REQ_BUFF_SIZE_EP7 == 0 ? 5 : REQ_BUFF_SIZE_EP7 < 2*(2**MTU) ? MTU+1 : diff --git a/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.vh b/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.vh index df84f4e22..f1721749a 100644 --- a/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.vh +++ b/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.vh @@ -12,9 +12,9 @@ // This file was automatically generated by the RFNoC image builder tool. // Re-running that tool will overwrite this file! // -// File generated on: 2022-03-29T22:54:34.688772 -// Source: x410_200_rfnoc_image_core.yml -// Source SHA256: 2f39eb00e4449ba15add66b6a3921d729afa21f8c34d609b82ca51d6b4ab8bec +// File generated on: 2022-04-05T20:50:48.367079 +// Source: ./x410_200_rfnoc_image_core.yml +// Source SHA256: 69661f9e2e1c218f3c199f2c8017b4b83f8b53eb47af157d455e27f719902f6b // `define CHDR_WIDTH 64 diff --git a/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.yml b/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.yml index fcad44768..f9246dee1 100644 --- a/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.yml +++ b/fpga/usrp3/top/x400/x410_200_rfnoc_image_core.yml @@ -34,19 +34,19 @@ stream_endpoints: ep4: ctrl: False data: True - buff_size_bytes: 16384 + buff_size_bytes: 32768 ep5: ctrl: False data: True - buff_size_bytes: 16384 + buff_size_bytes: 32768 ep6: ctrl: False data: True - buff_size_bytes: 16384 + buff_size_bytes: 32768 ep7: ctrl: False data: True - buff_size_bytes: 16384 + buff_size_bytes: 32768 # A list of all NoC blocks in design # ---------------------------------- |