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authorWade Fife <wade.fife@ettus.com>2021-06-11 14:34:06 -0500
committerWade Fife <wade.fife@ettus.com>2021-06-17 08:16:59 -0500
commitc0f9496d59947f8c9411b28d63d0c8e6244102a0 (patch)
tree5c778a5ba31b1e9dec18692958c1a126839400e8 /fpga/usrp3/top/x400
parent0076076467303247c4e62e5824e5bf8ce79cbe66 (diff)
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x400: sim: Move testbenches to sim folder
Diffstat (limited to 'fpga/usrp3/top/x400')
-rw-r--r--fpga/usrp3/top/x400/rf/sim/Makefile (renamed from fpga/usrp3/top/x400/rf/testbench/Makefile)0
-rw-r--r--fpga/usrp3/top/x400/rf/sim/rf_all_tb.sv (renamed from fpga/usrp3/top/x400/rf/testbench/rf_all_tb.sv)0
-rw-r--r--fpga/usrp3/top/x400/rf/sim/tb_adc_gearbox_2x1.vhd (renamed from fpga/usrp3/top/x400/rf/testbench/tb_adc_gearbox_2x1.vhd)0
-rw-r--r--fpga/usrp3/top/x400/rf/sim/tb_adc_gearbox_2x4.vhd (renamed from fpga/usrp3/top/x400/rf/testbench/tb_adc_gearbox_2x4.vhd)0
-rw-r--r--fpga/usrp3/top/x400/rf/sim/tb_adc_gearbox_8x4.vhd (renamed from fpga/usrp3/top/x400/rf/testbench/tb_adc_gearbox_8x4.vhd)0
-rw-r--r--fpga/usrp3/top/x400/rf/sim/tb_capture_sysref.vhd (renamed from fpga/usrp3/top/x400/rf/testbench/tb_capture_sysref.vhd)0
-rw-r--r--fpga/usrp3/top/x400/rf/sim/tb_dac_gearbox_12x8.vhd (renamed from fpga/usrp3/top/x400/rf/testbench/tb_dac_gearbox_12x8.vhd)0
-rw-r--r--fpga/usrp3/top/x400/rf/sim/tb_dac_gearbox_4x2.vhd (renamed from fpga/usrp3/top/x400/rf/testbench/tb_dac_gearbox_4x2.vhd)0
-rw-r--r--fpga/usrp3/top/x400/rf/sim/tb_dac_gearbox_6x12.vhd (renamed from fpga/usrp3/top/x400/rf/testbench/tb_dac_gearbox_6x12.vhd)0
-rw-r--r--fpga/usrp3/top/x400/rf/sim/tb_ddc_400m_saturate.vhd (renamed from fpga/usrp3/top/x400/rf/testbench/tb_ddc_400m_saturate.vhd)0
-rw-r--r--fpga/usrp3/top/x400/rf/sim/tb_duc_400m_saturate.vhd (renamed from fpga/usrp3/top/x400/rf/testbench/tb_duc_400m_saturate.vhd)0
-rw-r--r--fpga/usrp3/top/x400/rf/sim/tb_rf_nco_reset.vhd (renamed from fpga/usrp3/top/x400/rf/testbench/tb_rf_nco_reset.vhd)0
-rw-r--r--fpga/usrp3/top/x400/rf/sim/tb_rf_reset_controller.vhd (renamed from fpga/usrp3/top/x400/rf/testbench/tb_rf_reset_controller.vhd)0
13 files changed, 0 insertions, 0 deletions
diff --git a/fpga/usrp3/top/x400/rf/testbench/Makefile b/fpga/usrp3/top/x400/rf/sim/Makefile
index 08b62f4fb..08b62f4fb 100644
--- a/fpga/usrp3/top/x400/rf/testbench/Makefile
+++ b/fpga/usrp3/top/x400/rf/sim/Makefile
diff --git a/fpga/usrp3/top/x400/rf/testbench/rf_all_tb.sv b/fpga/usrp3/top/x400/rf/sim/rf_all_tb.sv
index c64bcf923..c64bcf923 100644
--- a/fpga/usrp3/top/x400/rf/testbench/rf_all_tb.sv
+++ b/fpga/usrp3/top/x400/rf/sim/rf_all_tb.sv
diff --git a/fpga/usrp3/top/x400/rf/testbench/tb_adc_gearbox_2x1.vhd b/fpga/usrp3/top/x400/rf/sim/tb_adc_gearbox_2x1.vhd
index f5c58ccf5..f5c58ccf5 100644
--- a/fpga/usrp3/top/x400/rf/testbench/tb_adc_gearbox_2x1.vhd
+++ b/fpga/usrp3/top/x400/rf/sim/tb_adc_gearbox_2x1.vhd
diff --git a/fpga/usrp3/top/x400/rf/testbench/tb_adc_gearbox_2x4.vhd b/fpga/usrp3/top/x400/rf/sim/tb_adc_gearbox_2x4.vhd
index b36f7de54..b36f7de54 100644
--- a/fpga/usrp3/top/x400/rf/testbench/tb_adc_gearbox_2x4.vhd
+++ b/fpga/usrp3/top/x400/rf/sim/tb_adc_gearbox_2x4.vhd
diff --git a/fpga/usrp3/top/x400/rf/testbench/tb_adc_gearbox_8x4.vhd b/fpga/usrp3/top/x400/rf/sim/tb_adc_gearbox_8x4.vhd
index 88e520a6b..88e520a6b 100644
--- a/fpga/usrp3/top/x400/rf/testbench/tb_adc_gearbox_8x4.vhd
+++ b/fpga/usrp3/top/x400/rf/sim/tb_adc_gearbox_8x4.vhd
diff --git a/fpga/usrp3/top/x400/rf/testbench/tb_capture_sysref.vhd b/fpga/usrp3/top/x400/rf/sim/tb_capture_sysref.vhd
index eb5cbcf08..eb5cbcf08 100644
--- a/fpga/usrp3/top/x400/rf/testbench/tb_capture_sysref.vhd
+++ b/fpga/usrp3/top/x400/rf/sim/tb_capture_sysref.vhd
diff --git a/fpga/usrp3/top/x400/rf/testbench/tb_dac_gearbox_12x8.vhd b/fpga/usrp3/top/x400/rf/sim/tb_dac_gearbox_12x8.vhd
index cde766cbd..cde766cbd 100644
--- a/fpga/usrp3/top/x400/rf/testbench/tb_dac_gearbox_12x8.vhd
+++ b/fpga/usrp3/top/x400/rf/sim/tb_dac_gearbox_12x8.vhd
diff --git a/fpga/usrp3/top/x400/rf/testbench/tb_dac_gearbox_4x2.vhd b/fpga/usrp3/top/x400/rf/sim/tb_dac_gearbox_4x2.vhd
index 45fe9e150..45fe9e150 100644
--- a/fpga/usrp3/top/x400/rf/testbench/tb_dac_gearbox_4x2.vhd
+++ b/fpga/usrp3/top/x400/rf/sim/tb_dac_gearbox_4x2.vhd
diff --git a/fpga/usrp3/top/x400/rf/testbench/tb_dac_gearbox_6x12.vhd b/fpga/usrp3/top/x400/rf/sim/tb_dac_gearbox_6x12.vhd
index 950ed8db1..950ed8db1 100644
--- a/fpga/usrp3/top/x400/rf/testbench/tb_dac_gearbox_6x12.vhd
+++ b/fpga/usrp3/top/x400/rf/sim/tb_dac_gearbox_6x12.vhd
diff --git a/fpga/usrp3/top/x400/rf/testbench/tb_ddc_400m_saturate.vhd b/fpga/usrp3/top/x400/rf/sim/tb_ddc_400m_saturate.vhd
index 37f570d87..37f570d87 100644
--- a/fpga/usrp3/top/x400/rf/testbench/tb_ddc_400m_saturate.vhd
+++ b/fpga/usrp3/top/x400/rf/sim/tb_ddc_400m_saturate.vhd
diff --git a/fpga/usrp3/top/x400/rf/testbench/tb_duc_400m_saturate.vhd b/fpga/usrp3/top/x400/rf/sim/tb_duc_400m_saturate.vhd
index e3117bdd6..e3117bdd6 100644
--- a/fpga/usrp3/top/x400/rf/testbench/tb_duc_400m_saturate.vhd
+++ b/fpga/usrp3/top/x400/rf/sim/tb_duc_400m_saturate.vhd
diff --git a/fpga/usrp3/top/x400/rf/testbench/tb_rf_nco_reset.vhd b/fpga/usrp3/top/x400/rf/sim/tb_rf_nco_reset.vhd
index 066dd5f4b..066dd5f4b 100644
--- a/fpga/usrp3/top/x400/rf/testbench/tb_rf_nco_reset.vhd
+++ b/fpga/usrp3/top/x400/rf/sim/tb_rf_nco_reset.vhd
diff --git a/fpga/usrp3/top/x400/rf/testbench/tb_rf_reset_controller.vhd b/fpga/usrp3/top/x400/rf/sim/tb_rf_reset_controller.vhd
index 31a98fd67..31a98fd67 100644
--- a/fpga/usrp3/top/x400/rf/testbench/tb_rf_reset_controller.vhd
+++ b/fpga/usrp3/top/x400/rf/sim/tb_rf_reset_controller.vhd