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| author | Javier Valenzuela <javier.valenzuela@ni.com> | 2022-03-02 13:44:35 -0600 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2022-03-04 09:41:24 -0600 |
| commit | 1d7d1226e7576bfad484109afd3aad4e78af111b (patch) | |
| tree | fa80590c2550029cbd2f82fb12c662b0be1df263 /fpga/usrp3/top/x400/x4xx.v | |
| parent | adb352a2ad81d7c6d70ec5880a787b6bab7d19ba (diff) | |
| download | uhd-1d7d1226e7576bfad484109afd3aad4e78af111b.tar.gz uhd-1d7d1226e7576bfad484109afd3aad4e78af111b.tar.bz2 uhd-1d7d1226e7576bfad484109afd3aad4e78af111b.zip | |
fpga: x400: Add SPI Controller Info register
Include a register that contains SPI controller information.
Currently, it only provides the number of slaves addressable
by the SPI engine.
Diffstat (limited to 'fpga/usrp3/top/x400/x4xx.v')
| -rw-r--r-- | fpga/usrp3/top/x400/x4xx.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/fpga/usrp3/top/x400/x4xx.v b/fpga/usrp3/top/x400/x4xx.v index c16f551d5..07022a3fc 100644 --- a/fpga/usrp3/top/x400/x4xx.v +++ b/fpga/usrp3/top/x400/x4xx.v @@ -2284,12 +2284,12 @@ endmodule // <li> Version last modified: @.VERSIONING_REGS_REGMAP..VERSION_LAST_MODIFIED // </info> // <value name="FPGA_CURRENT_VERSION_MAJOR" integer="7"/> -// <value name="FPGA_CURRENT_VERSION_MINOR" integer="6"/> +// <value name="FPGA_CURRENT_VERSION_MINOR" integer="7"/> // <value name="FPGA_CURRENT_VERSION_BUILD" integer="0"/> // <value name="FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR" integer="7"/> // <value name="FPGA_OLDEST_COMPATIBLE_VERSION_MINOR" integer="0"/> // <value name="FPGA_OLDEST_COMPATIBLE_VERSION_BUILD" integer="0"/> -// <value name="FPGA_VERSION_LAST_MODIFIED_TIME" integer="0x22022411"/> +// <value name="FPGA_VERSION_LAST_MODIFIED_TIME" integer="0x22030212"/> // </enumeratedtype> // </group> //</regmap> |