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authorWade Fife <wade.fife@ettus.com>2021-12-07 15:02:24 -0600
committerWade Fife <wade.fife@ettus.com>2022-02-07 13:08:11 -0700
commit19a333a2682898c4720a1316d4bcd6b3046d23ba (patch)
tree3c147a6fc95e10c85bde9faf0ff8b8196b8bdb92 /fpga/usrp3/top/x400/Makefile.x4xx.inc
parent7b8d45380577ee27916a59c3f66eafb6f00ea7ca (diff)
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fpga: x400: Add DRAM support
Diffstat (limited to 'fpga/usrp3/top/x400/Makefile.x4xx.inc')
-rw-r--r--fpga/usrp3/top/x400/Makefile.x4xx.inc15
1 files changed, 8 insertions, 7 deletions
diff --git a/fpga/usrp3/top/x400/Makefile.x4xx.inc b/fpga/usrp3/top/x400/Makefile.x4xx.inc
index fa6208088..b74eeeb02 100644
--- a/fpga/usrp3/top/x400/Makefile.x4xx.inc
+++ b/fpga/usrp3/top/x400/Makefile.x4xx.inc
@@ -47,6 +47,8 @@ include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_null_src_sink/Makefile.srcs
include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_radio/Makefile.srcs
include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_ddc/Makefile.srcs
include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_duc/Makefile.srcs
+include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_axi_ram_fifo/Makefile.srcs
+include $(LIB_DIR)/rfnoc/blocks/rfnoc_block_replay/Makefile.srcs
# If out-of-tree modules want to be compiled into this image, then they need to
# pass in the RFNOC_OOT_MAKEFILE_SRCS as a list of Makefile.srcs files.
@@ -75,6 +77,7 @@ x4xx_versioning_regs.v \
x4xx_dio.v \
x4xx_gpio_atr.v \
x4xx_gpio_spi.v \
+x4xx_dram.v \
rf/100m/rf_core_100m.v \
rf/200m/rf_core_200m.v \
rf/200m/rf_down_4to2.v \
@@ -99,7 +102,9 @@ MB_XDC = \
constraints/pins/common.xdc \
constraints/pins/rfdc_2x2.xdc \
constraints/timing/shared_constants.sdc \
-constraints/timing/common.xdc
+constraints/timing/common.xdc \
+constraints/pins/dram.xdc \
+constraints/timing/dram.xdc
# Definitions
# MGT Types from x4xx_mgt_type.vh
@@ -140,12 +145,6 @@ ifneq (,$(findstring QSFP1_3,$(EXTRA_DEFS)))
MB_XDC += constraints/pins/qsfp1_3.xdc
endif
-ifndef NO_DRAM_FIFOS
-DRAM_SRCS =
-else
-DRAM_SRCS =
-endif
-
ifdef X410
DESIGN_SRCS = $(abspath $(MB_XDC))
endif
@@ -165,6 +164,8 @@ $(RADIO_SRCS) $(CAP_GEN_GENERIC_SRCS) $(IP_XCI_SRCS) $(BD_SRCS) \
$(RFNOC_SRCS) $(RFNOC_OOT_SRCS) $(LIB_IP_XCI_SRCS) $(LIB_HLS_IP_SRCS) $(LIBCOREGEN_SRCS) \
$(RFNOC_BLOCK_DUC_SRCS) $(RFNOC_BLOCK_DDC_SRCS) \
$(RFNOC_BLOCK_RADIO_SRCS) $(RFNOC_BLOCK_NULL_SRC_SINK_SRCS) \
+$(RFNOC_BLOCK_AXI_RAM_FIFO_SRCS) \
+$(RFNOC_BLOCK_REPLAY_SRCS) \
$(DB_COMMON_SRCS) $(WHITE_RABBIT_SRCS) $(RFNOC_FRAMEWORK_SRCS) \
$(WB_SPI_SRCS) $(RFNOC_XPORT_SV_SRCS) \
)