Squashed B200 FPGA Source. Code from Josh Blum, Ian Buckley, and Matt Ettus.

1 files changed, 25 insertions, 0 deletions

diff --git a/fpga/usrp3/top/python/check_timing.py b/fpga/usrp3/top/python/check_timing.py
new file mode 100644
index 000000000..4fec3e7d4
--- /dev/null
+++ b/fpga/usrp3/top/python/check_timing.py
@@ -0,0 +1,25 @@
+#!/usr/bin/env python
+#
+# Copyright 2011-2012 Ettus Research LLC
+#
+
+import sys
+import re
+
+def print_timing_constraint_summary(twr_file):
+    output = ""
+    keep = False
+    done = False
+    try: open(twr_file)
+    except IOError:
+        print "cannot open or find %s; no timing summary to print!"%twr_file
+        exit(-1)
+    for line in open(twr_file).readlines():
+        if 'Derived Constraint Report' in line: keep = True
+        if 'constraint' in line and 'met' in line: done = True
+        if not keep and done: keep = True
+        if keep: output += line
+        if done: break
+    print("\n\n"+output)
+
+if __name__=='__main__': map(print_timing_constraint_summary, sys.argv[1:])