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| author | steviez <steve.czabaniuk@ni.com> | 2020-07-31 12:08:19 -0500 |
|---|---|---|
| committer | Aaron Rossetto <aaron.rossetto@ni.com> | 2020-07-31 14:32:54 -0500 |
| commit | ae2b9bf7aeea6f8f98f6dacffdfc018d87107927 (patch) | |
| tree | fa347454688a166df980e3d152133a2af07c2308 /fpga/usrp3/top/n3xx/Makefile | |
| parent | b5575603e1dd06efa2d0309b7efb0b92a7519316 (diff) | |
| download | uhd-ae2b9bf7aeea6f8f98f6dacffdfc018d87107927.tar.gz uhd-ae2b9bf7aeea6f8f98f6dacffdfc018d87107927.tar.bz2 uhd-ae2b9bf7aeea6f8f98f6dacffdfc018d87107927.zip | |
fpga: n320: Add BIST (AA) image files
This adds new image files which come with a DRAM FIFO. The addition of
an N320 image with a DRAM FIFO allows DDR3 BIST to be run on an
assembled (motherboard + daughterboard) N320.
This image is intentionally very similar to the N300_AA and N310_AA
targets which serve the same purpose of providing an image with a DRAM
FIFO for their respective devices.
Diffstat (limited to 'fpga/usrp3/top/n3xx/Makefile')
| -rw-r--r-- | fpga/usrp3/top/n3xx/Makefile | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/fpga/usrp3/top/n3xx/Makefile b/fpga/usrp3/top/n3xx/Makefile index 5900b26d0..f1aef0c68 100644 --- a/fpga/usrp3/top/n3xx/Makefile +++ b/fpga/usrp3/top/n3xx/Makefile @@ -39,6 +39,7 @@ N310_DEFAULTS:=DEFAULT_RFNOC_IMAGE_CORE_FILE=n310_rfnoc_image_core.v DEFAULT_EDG N320_DEFAULTS:=DEFAULT_RFNOC_IMAGE_CORE_FILE=n320_rfnoc_image_core.v DEFAULT_EDGE_FILE=$(abspath n320_static_router.hex) N300AA_DEFAULTS:=DEFAULT_RFNOC_IMAGE_CORE_FILE=n300_bist_image_core.v DEFAULT_EDGE_FILE=$(abspath n300_bist_static_router.hex) N310AA_DEFAULTS:=DEFAULT_RFNOC_IMAGE_CORE_FILE=n310_bist_image_core.v DEFAULT_EDGE_FILE=$(abspath n310_bist_static_router.hex) +N320AA_DEFAULTS:=DEFAULT_RFNOC_IMAGE_CORE_FILE=n320_bist_image_core.v DEFAULT_EDGE_FILE=$(abspath n320_bist_static_router.hex) # Set build option (check RTL, run synthesis, or do a full build) ifndef TARGET @@ -162,6 +163,11 @@ N320_AQ: build/usrp_n320_fpga_AQ.dts $(call vivado_build,N320,$(AQ_DEFS) N320=1,$(N320_DEFAULTS)) $(call post_build,N320,AQ) +##N320_AA: Aurora on SFP+ Port0, Aurora on SFP+ Port1. +N320_AA: build/usrp_n320_fpga_AA.dts + $(call vivado_build,N320,$(AA_DEFS) N320=1,$(N320AA_DEFAULTS)) + $(call post_build,N320,AA) + build/%.dts: dts/%.dts dts/*.dtsi -mkdir -p build ${CC} -o $@ -E -I dts -nostdinc -undef -x assembler-with-cpp -D__DTS__ $< |