diff options
author | Martin Braun <martin.braun@ettus.com> | 2020-07-17 14:31:53 +0200 |
---|---|---|
committer | Wade Fife <wade.fife@ettus.com> | 2020-07-18 13:33:42 -0500 |
commit | b18eaa75de2d1dcba2a1be0ee0b862a57e976cca (patch) | |
tree | 8391c4280d3618d1972ccf1015b29912f46612c6 /fpga/usrp3/top/e31x | |
parent | 74d157c8f67a413239c01fdfc78088623880f28f (diff) | |
download | uhd-b18eaa75de2d1dcba2a1be0ee0b862a57e976cca.tar.gz uhd-b18eaa75de2d1dcba2a1be0ee0b862a57e976cca.tar.bz2 uhd-b18eaa75de2d1dcba2a1be0ee0b862a57e976cca.zip |
e31x: Minor cleanup on top-level e31x.v module
- Fixed some incorrect comments
- Fixed some missing wire declarations for internal NIC
- Fix wire declarations for GPIO (they were declared too late)
Diffstat (limited to 'fpga/usrp3/top/e31x')
-rw-r--r-- | fpga/usrp3/top/e31x/e31x.v | 25 | ||||
-rw-r--r-- | fpga/usrp3/top/e31x/e31x_core.v | 4 |
2 files changed, 14 insertions, 15 deletions
diff --git a/fpga/usrp3/top/e31x/e31x.v b/fpga/usrp3/top/e31x/e31x.v index 12bf0f3a5..7aece6191 100644 --- a/fpga/usrp3/top/e31x/e31x.v +++ b/fpga/usrp3/top/e31x/e31x.v @@ -130,7 +130,7 @@ module e31x ( output TCXO_DAC_SDIN, input TCXO_CLK, - // gpios, change to inout somehow + // Internal GPIOs (INT0) inout [5:0] PL_GPIO ); @@ -170,7 +170,9 @@ module e31x ( //ETH DMA wire m_axi_eth_internal_arvalid; + wire m_axi_eth_internal_arready; wire m_axi_eth_internal_awvalid; + wire m_axi_eth_internal_awready; wire m_axi_eth_internal_bready; wire m_axi_eth_internal_rready; wire m_axi_eth_internal_wvalid; @@ -181,8 +183,9 @@ module e31x ( wire m_axi_eth_internal_rvalid; wire m_axi_eth_internal_wready; wire [1:0] m_axi_eth_internal_bresp; + wire m_axi_eth_internal_bvalid; wire [1:0] m_axi_eth_internal_rresp; - wire [31:0] m_axi_eth_internal_rdata; + wire [31:0] m_axi_eth_internal_rdata; // Crossbar wire m_axi_xbar_arvalid; @@ -251,6 +254,11 @@ module e31x ( wire s_axis_dma_tready; wire s_axis_dma_tvalid; + // GPIO + wire [63:0] ps_gpio_in; + wire [63:0] ps_gpio_out; + wire [63:0] ps_gpio_tri; + //Misc wire [15:0] device_id; @@ -462,10 +470,6 @@ module e31x ( // ////////////////////////////////////////////////////////////////////// - wire [63:0] ps_gpio_in; - wire [63:0] ps_gpio_out; - wire [63:0] ps_gpio_tri; - e31x_ps_bd e31x_ps_bd_inst ( // DDR Interface @@ -815,12 +819,9 @@ module e31x ( ///////////////////////////////////////////////////////////////////// // - // E320 Core: - // - xbar - // - Radio - // - DMA - // - DRAM - // - CEs + // E310 Core: + // - RFNoC Image Core (incl. radio, RFNoC blocks, etc.) + // - Other RFNoC controls // ////////////////////////////////////////////////////////////////////// diff --git a/fpga/usrp3/top/e31x/e31x_core.v b/fpga/usrp3/top/e31x/e31x_core.v index fc911553d..8037b886b 100644 --- a/fpga/usrp3/top/e31x/e31x_core.v +++ b/fpga/usrp3/top/e31x/e31x_core.v @@ -8,9 +8,7 @@ // Module: e31x_core // Description: // - Motherboard Registers -// - Crossbar -// - Noc Block Radio -// - Noc Block Dram Fifo +// - RFNoC Image Core + Blocks // - Radio Front End control // ///////////////////////////////////////////////////////////////////// |