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| author | Wade Fife <wade.fife@ettus.com> | 2020-08-18 10:03:30 -0500 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2020-08-19 12:28:22 -0500 |
| commit | 9c4a23f0a2a2d38ace75e4ab29f6f62f64155d81 (patch) | |
| tree | 166eb6113cb195cc289318733ddb0e5ec993dc90 /fpga/usrp3/top/e31x | |
| parent | e94a209c5b2559348593a6732d694fd49ab59ad0 (diff) | |
| download | uhd-9c4a23f0a2a2d38ace75e4ab29f6f62f64155d81.tar.gz uhd-9c4a23f0a2a2d38ace75e4ab29f6f62f64155d81.tar.bz2 uhd-9c4a23f0a2a2d38ace75e4ab29f6f62f64155d81.zip | |
fpga: e320: Fix timeout for timekeeper registers
This implements the same change that was made for E31x. The same issue
wasn't reproduced on N3xx, however this change keeps the code
consistent and eliminates the potential for the same problem.
Diffstat (limited to 'fpga/usrp3/top/e31x')
0 files changed, 0 insertions, 0 deletions