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authorRobertWalstab <robert.walstab@gmail.com>2020-06-02 16:37:56 +0200
committerAaron Rossetto <aaron.rossetto@ni.com>2020-07-16 10:00:12 -0500
commit3f823004600472c7f4b173a0da83a3bd53968c40 (patch)
tree485af49e228d054c08fb27d6b852803931a0f6be /fpga/usrp3/top/e31x/Makefile.e31x.inc
parentcc06b4dde69509b0681b8c2d062e47ce1f6a1eb8 (diff)
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e31x: Swap out liberio for internal Ethernet
Diffstat (limited to 'fpga/usrp3/top/e31x/Makefile.e31x.inc')
-rw-r--r--fpga/usrp3/top/e31x/Makefile.e31x.inc2
1 files changed, 2 insertions, 0 deletions
diff --git a/fpga/usrp3/top/e31x/Makefile.e31x.inc b/fpga/usrp3/top/e31x/Makefile.e31x.inc
index 7dde9a8a5..5e2b63853 100644
--- a/fpga/usrp3/top/e31x/Makefile.e31x.inc
+++ b/fpga/usrp3/top/e31x/Makefile.e31x.inc
@@ -25,6 +25,7 @@ include $(LIB_DIR)/hls/Makefile.inc
include $(LIB_DIR)/control/Makefile.srcs
include $(LIB_DIR)/fifo/Makefile.srcs
include $(LIB_DIR)/axi/Makefile.srcs
+include $(LIB_DIR)/xge_interface/Makefile.srcs
include $(LIB_DIR)/timing/Makefile.srcs
include $(LIB_DIR)/packet_proc/Makefile.srcs
include $(LIB_DIR)/dsp/Makefile.srcs
@@ -66,6 +67,7 @@ DESIGN_SRCS = \
$(abspath $(TOP_SRCS)) \
$(CONTROL_LIB_SRCS) \
$(IP_XCI_SRCS) \
+$(XGE_INTERFACE_SRCS) \
$(PACKET_PROC_SRCS) \
$(AXI_SRCS) \
$(FIFO_SRCS) \