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authorWade Fife <wade.fife@ettus.com>2020-08-26 13:51:51 -0500
committerWade Fife <wade.fife@ettus.com>2020-08-28 15:07:38 -0500
commitc6bb9924e56664ccb337694f8ef485ba8245edfd (patch)
tree673fc767d9b70e11a3ddae1983d0a75356a48e21 /fpga/usrp3/sim/rfnoc
parentd352f5a9c3bd3791f0320be1e615146fe7459453 (diff)
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fpga: n3xx: Update AXI interconnect address range
This change allows the entire 2 GiB address space to be accessed on each memory port.
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