diff options
| author | Max Köhler <max.koehler@ni.com> | 2020-03-03 14:28:30 +0100 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2020-03-09 13:40:17 -0500 |
| commit | b92597e1c9b6f09d5e62e55a60e33c04d437a50a (patch) | |
| tree | 807bfccd4db6fd9846e3328fa6bf47eed233aad7 /fpga/usrp3/sim/rfnoc/PkgChdrIfaceBfm.sv | |
| parent | e06ff0f5e08458256bf7ffdd3d9c84c4c1046807 (diff) | |
| download | uhd-b92597e1c9b6f09d5e62e55a60e33c04d437a50a.tar.gz uhd-b92597e1c9b6f09d5e62e55a60e33c04d437a50a.tar.bz2 uhd-b92597e1c9b6f09d5e62e55a60e33c04d437a50a.zip | |
fpga: lib: Modify for loop to Verilog 2001 syntax
This changes the for loop to use the generate keyword, making it
compatible with Verilog 2001. This allows tools that only support
Verilog 2001 to use this file (e.g., Intel Quartus).
Diffstat (limited to 'fpga/usrp3/sim/rfnoc/PkgChdrIfaceBfm.sv')
0 files changed, 0 insertions, 0 deletions