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author | Wade Fife <wade.fife@ettus.com> | 2022-02-28 14:46:16 -0600 |
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committer | Wade Fife <wade.fife@ettus.com> | 2022-03-04 09:42:39 -0600 |
commit | a6f666092a21c689d36e113b4999ee970e960c9a (patch) | |
tree | 27a2789d236cb14c34eb6e3c089155d287197ffd /fpga/usrp3/sim/general | |
parent | 30a9cc14bb49bf33f90c151a52dae1409cb0c735 (diff) | |
download | uhd-a6f666092a21c689d36e113b4999ee970e960c9a.tar.gz uhd-a6f666092a21c689d36e113b4999ee970e960c9a.tar.bz2 uhd-a6f666092a21c689d36e113b4999ee970e960c9a.zip |
rfnoc: Fix block buffer sizes referring to MTU
In the HDL, the parameter named 'MTU' is clog2 of the size of the
desired MTU. For example, when the 'MTU' parameter is 10, that means
the actual MTU setting is 2**MTU or 1024. So we need to set our
buffers to 2**MTU if we want them to be one MTU in size.
Diffstat (limited to 'fpga/usrp3/sim/general')
0 files changed, 0 insertions, 0 deletions