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author | Wade Fife <wade.fife@ettus.com> | 2021-04-05 16:02:45 -0500 |
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committer | Wade Fife <wade.fife@ettus.com> | 2021-04-09 17:26:59 -0500 |
commit | 0b965d579e2df962b91dac141eef6668f932e992 (patch) | |
tree | 75b7baffd8364cacbf17b77c4ce3defd2c795fbc /fpga/usrp3/lib/hls | |
parent | c3508cbf4ea3965e7b7acebfba176ca058545b77 (diff) | |
download | uhd-0b965d579e2df962b91dac141eef6668f932e992.tar.gz uhd-0b965d579e2df962b91dac141eef6668f932e992.tar.bz2 uhd-0b965d579e2df962b91dac141eef6668f932e992.zip |
fpga: lib: Fix simulation of axi_fir_filter
The always(*) block was never executing in some simulators because
there were no signals on the right-hand side in the block. Changing it
to an initial block ensures it always runs.
Diffstat (limited to 'fpga/usrp3/lib/hls')
0 files changed, 0 insertions, 0 deletions