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authorWade Fife <wade.fife@ettus.com>2020-06-25 00:24:25 -0500
committerAaron Rossetto <aaron.rossetto@ni.com>2020-07-30 12:51:41 -0500
commitb0b3849a18e1f2d3cb255a507b01ac5e7a9416a0 (patch)
treeef5f3484533448c3f512bd257372b42e995d02a4 /fpga/usrp3/lib/axi/Makefile.srcs
parentaca52b700282153760ae9331a791ddd41a2f4dd5 (diff)
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fpga: lib: Add axis_packetize module
This module takes an AXI-Stream without TLAST and outputs the same AXI-Stream with TLAST based on the provided packet size input.
Diffstat (limited to 'fpga/usrp3/lib/axi/Makefile.srcs')
-rw-r--r--fpga/usrp3/lib/axi/Makefile.srcs1
1 files changed, 1 insertions, 0 deletions
diff --git a/fpga/usrp3/lib/axi/Makefile.srcs b/fpga/usrp3/lib/axi/Makefile.srcs
index bf8b3dbd2..598af9ef3 100644
--- a/fpga/usrp3/lib/axi/Makefile.srcs
+++ b/fpga/usrp3/lib/axi/Makefile.srcs
@@ -34,4 +34,5 @@ axis_upsizer.v \
axis_downsizer.v \
axis_width_conv.v \
axis_split.v \
+axis_packetize.v \
))