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| author | Nick Foster <nick@ettus.com> | 2011-05-23 13:24:29 -0700 |
|---|---|---|
| committer | Nick Foster <nick@ettus.com> | 2011-05-23 13:24:29 -0700 |
| commit | 92c664bd52adb57f09b5ceae08361a08ce405935 (patch) | |
| tree | cb9cf01c799ae26db4b3d7e1cac239110d6ff3e0 /fpga/usrp2 | |
| parent | 21856ee1ba8fb755bf94a0c70c76287f4998b6bf (diff) | |
| parent | f9fae3373e67c1bc19ab594d4b5604d69ecb0d68 (diff) | |
| download | uhd-92c664bd52adb57f09b5ceae08361a08ce405935.tar.gz uhd-92c664bd52adb57f09b5ceae08361a08ce405935.tar.bz2 uhd-92c664bd52adb57f09b5ceae08361a08ce405935.zip | |
Merge branch 'master' of ettus.sourcerepo.com:ettus/uhdpriv
Diffstat (limited to 'fpga/usrp2')
| -rw-r--r-- | fpga/usrp2/top/u2plus/u2plus.v | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/fpga/usrp2/top/u2plus/u2plus.v b/fpga/usrp2/top/u2plus/u2plus.v index c0140e989..7c2270df6 100644 --- a/fpga/usrp2/top/u2plus/u2plus.v +++ b/fpga/usrp2/top/u2plus/u2plus.v @@ -348,12 +348,15 @@ module u2plus // DAC A is also inverted in schematic to facilitate clean layout always @(negedge dsp_clk) DACA <= ~dac_b_int; always @(negedge dsp_clk) DACB <= dac_a_int; + + wire pps; + assign pps = PPS_IN ^ PPS2_IN; u2plus_core u2p_c(.dsp_clk (dsp_clk), .wb_clk (wb_clk), .clock_ready (clock_ready), .clk_to_mac (CLK_TO_MAC_int2), - .pps_in (PPS_IN), + .pps_in (pps), .leds (leds_int), .debug (debug[31:0]), .debug_clk (debug_clk[1:0]), |