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| author | Josh Blum <josh@joshknows.com> | 2011-05-09 16:47:04 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2011-05-09 16:47:04 -0700 |
| commit | 91e32eaea25b023ec33b0efc80a653dac5a676df (patch) | |
| tree | 0b1841b9a95a8ff22e47ec48387decd4005ca8db /fpga/usrp2/vrt/vita_tx_control.v | |
| parent | 9daf1f0a7be5f6a2cc220e0c2f746e65dc649568 (diff) | |
| parent | d8aae182ffdafdd61bbd0100f845d7c93e6ec591 (diff) | |
| download | uhd-91e32eaea25b023ec33b0efc80a653dac5a676df.tar.gz uhd-91e32eaea25b023ec33b0efc80a653dac5a676df.tar.bz2 uhd-91e32eaea25b023ec33b0efc80a653dac5a676df.zip | |
Merge branch 'next' into use_vita_length
Diffstat (limited to 'fpga/usrp2/vrt/vita_tx_control.v')
| -rw-r--r-- | fpga/usrp2/vrt/vita_tx_control.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga/usrp2/vrt/vita_tx_control.v b/fpga/usrp2/vrt/vita_tx_control.v index e966d987c..14b97a215 100644 --- a/fpga/usrp2/vrt/vita_tx_control.v +++ b/fpga/usrp2/vrt/vita_tx_control.v @@ -71,7 +71,7 @@ module vita_tx_control wire [31:0] error_policy; setting_reg #(.my_addr(BASE+3)) sr_error_policy - (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr), + (.clk(clk),.rst(reset),.strobe(set_stb),.addr(set_addr), .in(set_data),.out(error_policy),.changed()); wire policy_wait = error_policy[0]; |