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author | Nick Foster <nick@nerdnetworks.org> | 2010-08-10 17:02:47 -0700 |
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committer | Nick Foster <nick@nerdnetworks.org> | 2010-08-10 17:02:47 -0700 |
commit | 663808e847c4970551c6c8127c2c5d816e2a2014 (patch) | |
tree | 12183a2d7ea5434880dccfa414d8a378ae134abc /fpga/usrp2/vrt/gen_context_pkt.v | |
parent | 90a5d84a18aaa338092e572ff257aab1fdcc8e6b (diff) | |
parent | 9e419c7b7f35062ceb2ed4e508cadb163067593f (diff) | |
download | uhd-663808e847c4970551c6c8127c2c5d816e2a2014.tar.gz uhd-663808e847c4970551c6c8127c2c5d816e2a2014.tar.bz2 uhd-663808e847c4970551c6c8127c2c5d816e2a2014.zip |
Merge branch 'master' into usrp2p
this was the merge from hell
Conflicts:
firmware/microblaze/Makefile.am
firmware/microblaze/bootstrap
firmware/microblaze/configure.ac
firmware/microblaze/lib/Makefile.inc
host/lib/CMakeLists.txt
host/lib/usrp/mimo_usrp.cpp
host/lib/usrp/simple_usrp.cpp
host/lib/usrp/usrp2/clock_ctrl.cpp
host/lib/usrp/usrp2/codec_impl.cpp
host/lib/usrp/usrp2/dboard_impl.cpp
host/lib/usrp/usrp2/mboard_impl.cpp
host/lib/usrp/usrp2/usrp2_iface.hpp
host/lib/usrp/usrp2/usrp2_impl.hpp
host/lib/usrp/usrp2/usrp2_regs.hpp
host/test/CMakeLists.txt
Diffstat (limited to 'fpga/usrp2/vrt/gen_context_pkt.v')
-rw-r--r-- | fpga/usrp2/vrt/gen_context_pkt.v | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/fpga/usrp2/vrt/gen_context_pkt.v b/fpga/usrp2/vrt/gen_context_pkt.v new file mode 100644 index 000000000..780a027ba --- /dev/null +++ b/fpga/usrp2/vrt/gen_context_pkt.v @@ -0,0 +1,72 @@ + + +module gen_context_pkt + #(parameter PROT_ENG_FLAGS=1) + (input clk, input reset, input clear, + input trigger, output sent, + input [31:0] streamid, + input [63:0] vita_time, + input [31:0] message, + output [35:0] data_o, output src_rdy_o, input dst_rdy_i); + + localparam CTXT_IDLE = 0; + localparam CTXT_PROT_ENG = 1; + localparam CTXT_HEADER = 2; + localparam CTXT_STREAMID = 3; + localparam CTXT_SECS = 4; + localparam CTXT_TICS = 5; + localparam CTXT_TICS2 = 6; + localparam CTXT_MESSAGE = 7; + localparam CTXT_DONE = 8; + + reg [33:0] data_int; + wire src_rdy_int, dst_rdy_int; + wire [3:0] seqno = 0; + reg [3:0] ctxt_state; + reg [63:0] err_time; + + always @(posedge clk) + if(reset | clear) + ctxt_state <= CTXT_IDLE; + else + case(ctxt_state) + CTXT_IDLE : + if(trigger) + begin + err_time <= vita_time; + if(PROT_ENG_FLAGS) + ctxt_state <= CTXT_PROT_ENG; + else + ctxt_state <= CTXT_HEADER; + end + + CTXT_DONE : + if(~trigger) + ctxt_state <= CTXT_IDLE; + + default : + if(dst_rdy_int) + ctxt_state <= ctxt_state + 1; + endcase // case (ctxt_state) + + assign src_rdy_int = ~( (ctxt_state == CTXT_IDLE) | (ctxt_state == CTXT_DONE) ); + + always @* + case(ctxt_state) + CTXT_PROT_ENG : data_int <= { 2'b01, 16'd1, 16'd24 }; + CTXT_HEADER : data_int <= { 1'b0, (PROT_ENG_FLAGS ? 1'b0 : 1'b1), 12'b010100001101, seqno, 16'd6 }; + CTXT_STREAMID : data_int <= { 2'b00, streamid }; + CTXT_SECS : data_int <= { 2'b00, err_time[63:32] }; + CTXT_TICS : data_int <= { 2'b00, 32'd0 }; + CTXT_TICS2 : data_int <= { 2'b00, err_time[31:0] }; + CTXT_MESSAGE : data_int <= { 2'b10, message }; + default : data_int <= {2'b00, 32'b00}; + endcase // case (ctxt_state) + + fifo_short #(.WIDTH(34)) ctxt_fifo + (.clk(clk), .reset(reset), .clear(clear), + .datain(data_int), .src_rdy_i(src_rdy_int), .dst_rdy_o(dst_rdy_int), + .dataout(data_o[33:0]), .src_rdy_o(src_rdy_o), .dst_rdy_i(dst_rdy_i)); + assign data_o[35:34] = 2'b00; + +endmodule // gen_context_pkt |