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authorJosh Blum <josh@joshknows.com>2010-11-23 15:35:48 -0800
committerJosh Blum <josh@joshknows.com>2010-11-23 15:35:48 -0800
commitf56c1247cbe7b7e90acee2711b5dda3356b9486a (patch)
tree81dadc83537c2c50550cd94e224571e472176c6f /fpga/usrp2/top/u1e_passthru/passthru.v
parent9f94ef843ceca63bcb83b2d473cbba709c9110b6 (diff)
parenteb26e8adb4a5718ee3db3bb7f32c0cd31d060af9 (diff)
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Merge branch 'next' of ettus.sourcerepo.com:ettus/uhdpriv into next
Diffstat (limited to 'fpga/usrp2/top/u1e_passthru/passthru.v')
-rw-r--r--fpga/usrp2/top/u1e_passthru/passthru.v18
1 files changed, 18 insertions, 0 deletions
diff --git a/fpga/usrp2/top/u1e_passthru/passthru.v b/fpga/usrp2/top/u1e_passthru/passthru.v
new file mode 100644
index 000000000..12e4db017
--- /dev/null
+++ b/fpga/usrp2/top/u1e_passthru/passthru.v
@@ -0,0 +1,18 @@
+`timescale 1ns / 1ps
+//////////////////////////////////////////////////////////////////////////////////
+
+module passthru
+ (input overo_gpio145,
+ output cgen_sclk,
+ output cgen_sen_b,
+ output cgen_mosi,
+ input fpga_cfg_din,
+ input fpga_cfg_cclk
+ );
+
+ assign cgen_sclk = fpga_cfg_cclk;
+ assign cgen_sen_b = overo_gpio145;
+ assign cgen_mosi = fpga_cfg_din;
+
+
+endmodule // passthru