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| author | Josh Blum <josh@joshknows.com> | 2010-10-27 11:36:57 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2010-10-27 11:36:57 -0700 |
| commit | cfde84d8a1f2e9fc76e9d5c80f8f4aa571fa04a7 (patch) | |
| tree | 92e2c73cd37f4bde6dd6b4a0765e44c9586e7dcd /fpga/usrp2/top/u1e/timing.ucf | |
| parent | 1289d051a1934e48d77be695059b1d23f8668d8a (diff) | |
| parent | 1f77494788fa4fa8450aaf170055553bd0e5fe8e (diff) | |
| download | uhd-cfde84d8a1f2e9fc76e9d5c80f8f4aa571fa04a7.tar.gz uhd-cfde84d8a1f2e9fc76e9d5c80f8f4aa571fa04a7.tar.bz2 uhd-cfde84d8a1f2e9fc76e9d5c80f8f4aa571fa04a7.zip | |
Merge branch 'ue1_rev2' into usrp_e_next
Diffstat (limited to 'fpga/usrp2/top/u1e/timing.ucf')
| -rw-r--r-- | fpga/usrp2/top/u1e/timing.ucf | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/fpga/usrp2/top/u1e/timing.ucf b/fpga/usrp2/top/u1e/timing.ucf new file mode 100644 index 000000000..8df28c9d3 --- /dev/null +++ b/fpga/usrp2/top/u1e/timing.ucf @@ -0,0 +1,13 @@ + +NET "CLK_FPGA_P" TNM_NET = "CLK_FPGA_P"; +TIMESPEC "TS_clk_fpga_p" = PERIOD "CLK_FPGA_P" 15625 ps HIGH 50 %; + + + + +#NET "adc_a<*>" TNM_NET = ADC_DATA_GRP; +#NET "adc_b<*>" TNM_NET = ADC_DATA_GRP; +#TIMEGRP "ADC_DATA_GRP" OFFSET = IN 1 ns VALID 5 ns BEFORE "clk_fpga_p" RISING; + +#NET "adc_a<*>" OFFSET = IN 1 ns VALID 5 ns BEFORE "clk_fpga_p" RISING; +#NET "adc_b<*>" OFFSET = IN 1 ns VALID 5 ns BEFORE "clk_fpga_p" RISING; |