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| author | Josh Blum <josh@joshknows.com> | 2011-06-15 14:50:02 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2011-06-15 14:50:02 -0700 |
| commit | 0cef788d3d34a298c975e32c488e800a5c65ccce (patch) | |
| tree | 14b7f4242a28927b1701a73a3e8ec0df3fa04811 /fpga/usrp2/top/E1x0/timing.ucf | |
| parent | 7951170c6161d9266726ec19e8c009500cf11f75 (diff) | |
| parent | 27f1622d439ceb787e7dada733d0eb82270c5532 (diff) | |
| download | uhd-0cef788d3d34a298c975e32c488e800a5c65ccce.tar.gz uhd-0cef788d3d34a298c975e32c488e800a5c65ccce.tar.bz2 uhd-0cef788d3d34a298c975e32c488e800a5c65ccce.zip | |
Merge branch 'next'
Diffstat (limited to 'fpga/usrp2/top/E1x0/timing.ucf')
| -rw-r--r-- | fpga/usrp2/top/E1x0/timing.ucf | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/fpga/usrp2/top/E1x0/timing.ucf b/fpga/usrp2/top/E1x0/timing.ucf new file mode 100644 index 000000000..8df28c9d3 --- /dev/null +++ b/fpga/usrp2/top/E1x0/timing.ucf @@ -0,0 +1,13 @@ + +NET "CLK_FPGA_P" TNM_NET = "CLK_FPGA_P"; +TIMESPEC "TS_clk_fpga_p" = PERIOD "CLK_FPGA_P" 15625 ps HIGH 50 %; + + + + +#NET "adc_a<*>" TNM_NET = ADC_DATA_GRP; +#NET "adc_b<*>" TNM_NET = ADC_DATA_GRP; +#TIMEGRP "ADC_DATA_GRP" OFFSET = IN 1 ns VALID 5 ns BEFORE "clk_fpga_p" RISING; + +#NET "adc_a<*>" OFFSET = IN 1 ns VALID 5 ns BEFORE "clk_fpga_p" RISING; +#NET "adc_b<*>" OFFSET = IN 1 ns VALID 5 ns BEFORE "clk_fpga_p" RISING; |