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authorJosh Blum <josh@joshknows.com>2012-07-17 12:33:40 -0700
committerJosh Blum <josh@joshknows.com>2012-07-17 12:33:40 -0700
commit1b677b1cc46718ed9473700e2bb88666b70808f3 (patch)
tree9aa45721cb5f7b92f56243527cd2fc912ed3f976 /fpga/usrp2/top/E1x0/E1x0.ucf
parentf3e7f66907bf2d77258ae38a6117927a46fe41a6 (diff)
parent9ecbfeb8ee52b6a59b8757cb259b325cebd05199 (diff)
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Merge branch 'fpga_next' into next
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diff --git a/fpga/usrp2/top/E1x0/E1x0.ucf b/fpga/usrp2/top/E1x0/E1x0.ucf
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+
+NET "CLK_FPGA_P" LOC = "Y11" ;
+NET "CLK_FPGA_N" LOC = "Y10" ;
+
+## GPMC
+NET "EM_D<15>" LOC = "D13" ;
+NET "EM_D<14>" LOC = "D15" ;
+NET "EM_D<13>" LOC = "C16" ;
+NET "EM_D<12>" LOC = "B20" ;
+NET "EM_D<11>" LOC = "A19" ;
+NET "EM_D<10>" LOC = "A17" ;
+NET "EM_D<9>" LOC = "E15" ;
+NET "EM_D<8>" LOC = "F15" ;
+NET "EM_D<7>" LOC = "E16" ;
+NET "EM_D<6>" LOC = "F16" ;
+NET "EM_D<5>" LOC = "B17" ;
+NET "EM_D<4>" LOC = "C17" ;
+NET "EM_D<3>" LOC = "B19" ;
+NET "EM_D<2>" LOC = "D19" ;
+NET "EM_D<1>" LOC = "C19" ;
+NET "EM_D<0>" LOC = "A20" ;
+
+NET "EM_A<10>" LOC = "C14" ;
+NET "EM_A<9>" LOC = "C10" ;
+NET "EM_A<8>" LOC = "C5" ;
+NET "EM_A<7>" LOC = "A18" ;
+NET "EM_A<6>" LOC = "A15" ;
+NET "EM_A<5>" LOC = "A12" ;
+NET "EM_A<4>" LOC = "A10" ;
+NET "EM_A<3>" LOC = "E7" ;
+NET "EM_A<2>" LOC = "A7" ;
+NET "EM_A<1>" LOC = "C15" ;
+
+NET "EM_NCS6" LOC = "E17" ;
+NET "EM_NCS5" LOC = "E10" ;
+NET "EM_NCS4" LOC = "E6" ;
+#NET "EM_NCS1" LOC = "D18" ;
+#NET "EM_NCS0" LOC = "D17" ;
+
+NET "EM_CLK" LOC = "F11" ;
+NET "EM_WAIT0" LOC = "F14" ;
+NET "EM_NBE<1>" LOC = "D14" ;
+NET "EM_NBE<0>" LOC = "A13" ;
+NET "EM_NWE" LOC = "B13" ;
+NET "EM_NOE" LOC = "A14" ;
+#NET "EM_NADV_ALE" LOC = "B15" ;
+#NET "EM_NWP" LOC = "F13" ;
+
+## Overo GPIO
+NET "overo_gpio0" LOC = "F9" ; # MISC GPIO for debug
+NET "overo_gpio14" LOC = "C4" ; # MISC GPIO for debug
+NET "overo_gpio21" LOC = "D5" ; # MISC GPIO for debug
+NET "overo_gpio22" LOC = "A3" ; # MISC GPIO for debug
+NET "overo_gpio23" LOC = "B3" ; # MISC GPIO for debug
+NET "overo_gpio64" LOC = "A4" ; # MISC GPIO for debug
+NET "overo_gpio65" LOC = "F8" ; # MISC GPIO for debug
+
+NET "overo_gpio127" LOC = "C8" ; # Changed name to gpio10
+NET "overo_gpio128" LOC = "G8" ; # Changed name to gpio186
+
+NET "overo_gpio144" LOC = "A5" ; # tx_have_space
+NET "overo_gpio145" LOC = "C7" ; # tx_underrun
+NET "overo_gpio146" LOC = "A6" ; # rx_have_data
+NET "overo_gpio147" LOC = "B6" ; # rx_overrun
+NET "overo_gpio163" LOC = "D7" ; # MISC GPIO for debug
+NET "overo_gpio170" LOC = "E8" ; # MISC GPIO for debug
+NET "overo_gpio176" LOC = "B4" ; # MISC GPIO for debug
+
+## Overo UART
+NET "overo_txd1" LOC = "C6" ;
+NET "overo_rxd1" LOC = "D6" ;
+NET "fpga_txd1" LOC = "AB9" ;
+NET "fpga_rxd1" LOC = "AB8" ;
+
+## FTDI UART to USB converter
+NET "FPGA_TXD" LOC = "G19" ;
+NET "FPGA_RXD" LOC = "F20" ;
+
+#NET "SYSEN" LOC = "C11" ;
+
+## I2C
+NET "db_scl" LOC = "F19" ;
+NET "db_sda" LOC = "F18" ;
+
+## SPI
+### DBoard SPI
+NET "db_sclk_rx" LOC = "D21" ;
+NET "db_miso_rx" LOC = "D22" ;
+NET "db_mosi_rx" LOC = "D20" ;
+NET "db_sen_rx" LOC = "E19" ;
+NET "db_sclk_tx" LOC = "F21" ;
+NET "db_miso_tx" LOC = "E20" ;
+NET "db_mosi_tx" LOC = "G17" ;
+NET "db_sen_tx" LOC = "G18" ;
+
+### AD9862 SPI and aux SPI Interfaces
+#NET "aux_sdi_codec" LOC = "G3" ;
+#NET "aux_sdo_codec" LOC = "F3" ;
+#NET "aux_sclk_codec" LOC = "C1" ;
+NET "sen_codec" LOC = "F5" |IOSTANDARD = LVCMOS33;
+NET "mosi_codec" LOC = "F4" |IOSTANDARD = LVCMOS33;
+NET "miso_codec" LOC = "H4" ;
+NET "sclk_codec" LOC = "H3" |IOSTANDARD = LVCMOS33;
+
+### Clock Gen SPI
+NET "cgen_miso" LOC = "F22" ;
+NET "cgen_mosi" LOC = "E22" ;
+NET "cgen_sclk" LOC = "J19" ;
+NET "cgen_sen_b" LOC = "H20" ;
+
+## Clock gen control
+NET "cgen_st_status" LOC = "P20" ;
+NET "cgen_st_ld" LOC = "R17" ;
+NET "cgen_st_refmon" LOC = "P17" ;
+NET "cgen_sync_b" LOC = "U18" ;
+NET "cgen_ref_sel" LOC = "U19" ;
+
+## Debug pins
+NET "debug_led<3>" LOC = "Y15" ;
+NET "debug_led<2>" LOC = "K16" ;
+NET "debug_led<1>" LOC = "J17" ;
+NET "debug_led<0>" LOC = "H22" ;
+NET "debug<0>" LOC = "G22" ;
+NET "debug<1>" LOC = "H17" ;
+NET "debug<2>" LOC = "H18" ;
+NET "debug<3>" LOC = "K20" ;
+NET "debug<4>" LOC = "J20" ;
+NET "debug<5>" LOC = "K19" ;
+NET "debug<6>" LOC = "K18" ;
+NET "debug<7>" LOC = "L22" ;
+NET "debug<8>" LOC = "K22" ;
+NET "debug<9>" LOC = "N22" ;
+NET "debug<10>" LOC = "M22" ;
+NET "debug<11>" LOC = "N20" ;
+NET "debug<12>" LOC = "N19" ;
+NET "debug<13>" LOC = "R22" ;
+NET "debug<14>" LOC = "P22" ;
+NET "debug<15>" LOC = "N17" ;
+NET "debug<16>" LOC = "P16" ;
+NET "debug<17>" LOC = "U22" ;
+NET "debug<18>" LOC = "P19" ;
+NET "debug<19>" LOC = "R18" ;
+NET "debug<20>" LOC = "U20" ;
+NET "debug<21>" LOC = "T20" ;
+NET "debug<22>" LOC = "R19" ;
+NET "debug<23>" LOC = "R20" ;
+NET "debug<24>" LOC = "W22" ;
+NET "debug<25>" LOC = "Y22" ;
+NET "debug<26>" LOC = "T18" ;
+NET "debug<27>" LOC = "T17" ;
+NET "debug<28>" LOC = "W19" ;
+NET "debug<29>" LOC = "V20" ;
+NET "debug<30>" LOC = "Y21" ;
+NET "debug<31>" LOC = "AA22" ;
+NET "debug_clk<0>" LOC = "N18" ;
+NET "debug_clk<1>" LOC = "M17" ;
+
+NET "debug_pb" LOC = "C22" ;
+
+#NET "reset_codec" LOC = "C2" ;
+
+NET "RXSYNC" LOC = "F2" ;
+NET "DB<11>" LOC = "G6" ;
+NET "DB<10>" LOC = "G5" ;
+NET "DB<9>" LOC = "E4" ;
+NET "DB<8>" LOC = "E3" ;
+NET "DB<7>" LOC = "H6" ;
+NET "DB<6>" LOC = "H5" ;
+NET "DB<5>" LOC = "H1" ;
+NET "DB<4>" LOC = "G1" ;
+NET "DB<3>" LOC = "K5" ;
+NET "DB<2>" LOC = "K4" ;
+NET "DB<1>" LOC = "H2" ;
+NET "DB<0>" LOC = "L5" ;
+
+NET "DA<11>" LOC = "K6" ;
+NET "DA<10>" LOC = "K3" ;
+NET "DA<9>" LOC = "K2" ;
+NET "DA<8>" LOC = "N1" ;
+NET "DA<7>" LOC = "N5" ;
+NET "DA<6>" LOC = "N6" ;
+NET "DA<5>" LOC = "P2" ;
+NET "DA<4>" LOC = "P1" ;
+NET "DA<3>" LOC = "R6" ;
+NET "DA<2>" LOC = "P6" ;
+NET "DA<1>" LOC = "R1" ;
+NET "DA<0>" LOC = "R2" ;
+
+NET "TX<13>" LOC = "T6" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+NET "TX<12>" LOC = "U1" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+NET "TX<11>" LOC = "T1" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+NET "TX<10>" LOC = "R5" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+NET "TX<9>" LOC = "V1" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+NET "TX<8>" LOC = "U2" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+NET "TX<7>" LOC = "T4" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+NET "TX<6>" LOC = "R3" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+NET "TX<5>" LOC = "W1" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+NET "TX<4>" LOC = "Y1" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+NET "TX<3>" LOC = "V3" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+NET "TX<2>" LOC = "V4" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+NET "TX<1>" LOC = "W2" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+NET "TX<0>" LOC = "W3" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+NET "TXSYNC" LOC = "U5" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+NET "TXBLANK" LOC = "U4" |IOSTANDARD = LVCMOS33 |DRIVE = 12 |SLEW = FAST ;
+
+NET "PPS_IN" LOC = "M5" ;
+
+NET "io_tx<0>" LOC = "AB20" ;
+NET "io_tx<1>" LOC = "Y17" ;
+NET "io_tx<2>" LOC = "Y16" ;
+NET "io_tx<3>" LOC = "U16" ;
+NET "io_tx<4>" LOC = "V16" ;
+NET "io_tx<5>" LOC = "AB19" ;
+NET "io_tx<6>" LOC = "AA19" ;
+NET "io_tx<7>" LOC = "U14" ;
+NET "io_tx<8>" LOC = "U15" ;
+NET "io_tx<9>" LOC = "AB17" ;
+NET "io_tx<10>" LOC = "AB18" ;
+NET "io_tx<11>" LOC = "Y13" ;
+NET "io_tx<12>" LOC = "W14" ;
+NET "io_tx<13>" LOC = "U13" ;
+NET "io_tx<14>" LOC = "AA15" ;
+NET "io_tx<15>" LOC = "AB14" ;
+
+NET "io_rx<0>" LOC = "Y8" ;
+NET "io_rx<1>" LOC = "Y9" ;
+NET "io_rx<2>" LOC = "V7" ;
+NET "io_rx<3>" LOC = "U8" ;
+NET "io_rx<4>" LOC = "V10" ;
+NET "io_rx<5>" LOC = "U9" ;
+NET "io_rx<6>" LOC = "AB7" ;
+NET "io_rx<7>" LOC = "AA8" ;
+NET "io_rx<8>" LOC = "W8" ;
+NET "io_rx<9>" LOC = "V8" ;
+NET "io_rx<10>" LOC = "AB5" ;
+NET "io_rx<11>" LOC = "AB6" ;
+NET "io_rx<12>" LOC = "AB4" ;
+NET "io_rx<13>" LOC = "AA4" ;
+NET "io_rx<14>" LOC = "W5" ;
+NET "io_rx<15>" LOC = "Y4" ;
+
+#NET "CLKOUT2_CODEC" LOC = "U12" ;
+#NET "CLKOUT1_CODEC" LOC = "V12" ;
+
+## FPGA Config Pins
+#NET "fpga_cfg_prog_b" LOC = "A2" ;
+#NET "fpga_cfg_done" LOC = "AB21" ;
+#NET "fpga_cfg_din" LOC = "W17" ;
+#NET "fpga_cfg_cclk" LOC = "V17" ;
+#NET "fpga_cfg_init_b" LOC = "W15" ;
+
+## Unused
+#NET "unnamed_net53" LOC = "B1" ; # TMS
+#NET "unnamed_net52" LOC = "B22" ; # TDO
+#NET "unnamed_net51" LOC = "D2" ; # TDI
+#NET "unnamed_net50" LOC = "A21" ; # TCK
+#NET "unnamed_net59" LOC = "F7" ; # PUDC_B
+#NET "unnamed_net58" LOC = "V6" ; # M2
+#NET "unnamed_net57" LOC = "AA3" ; # M1
+#NET "unnamed_net56" LOC = "AB3" ; # M0
+#NET "GND" LOC = "V19" ; # Suspend, unused