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authorJosh Blum <josh@joshknows.com>2011-06-15 14:50:02 -0700
committerJosh Blum <josh@joshknows.com>2011-06-15 14:50:02 -0700
commit0cef788d3d34a298c975e32c488e800a5c65ccce (patch)
tree14b7f4242a28927b1701a73a3e8ec0df3fa04811 /fpga/usrp2/top/B100/timing.ucf
parent7951170c6161d9266726ec19e8c009500cf11f75 (diff)
parent27f1622d439ceb787e7dada733d0eb82270c5532 (diff)
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Diffstat (limited to 'fpga/usrp2/top/B100/timing.ucf')
-rw-r--r--fpga/usrp2/top/B100/timing.ucf5
1 files changed, 5 insertions, 0 deletions
diff --git a/fpga/usrp2/top/B100/timing.ucf b/fpga/usrp2/top/B100/timing.ucf
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+NET "CLK_FPGA_P" TNM_NET = "CLK_FPGA_P";
+TIMESPEC "TS_CLK_FPGA_P" = PERIOD "CLK_FPGA_P" 15625 ps HIGH 50 %;
+
+NET "IFCLK" TNM_NET = "IFCLK";
+TIMESPEC "TS_IFCLK" = PERIOD "IFCLK" 20833 ps HIGH 50 %;